I have the following makefile:
vpath %.c c:/usr/Leviticus/cm/RTCS2.76/SOURCE/APPS
default : binfile.o
%.o: %.c
echo "building .o file" $< $@
When I run it, I get the following error:
make: *** No rule to make target `binfile.o', needed by `default'. Stop.
even though binfile.c exists in that directory
If I change the makefile to read:
vpath %.c c:/usr/Leviticus/cm/RTCS2.76\SOURCE/APPS (notice one
slash has changed!)
default : binfile.o
%.o: %.c
echo "building .o file" $< $@
I get the following output:
echo "building .o file" /usr/Leviticus/cm/RTCS2.76\SOURCE/APPS/binfile.c
binfile.o
building .o file /usr/Leviticus/cm/RTCS2.76SOURCE/APPS/binfile.c binfile.o
This is a problem, as many commands intererate
/usr/Leviticus/cm/RTCS2.76\SOURCE/APPS/ as
usr/Leveviticus/cm/RTCS2.76SOURCE/APPS/... The worst part is, there's no
way around this problem that I can think of except for a really ugly subst
command.
I am running gnu make v3.79.1. This bug occurs with both MAKE_MODE=unix and
MAKE_MODE undefined.
John
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