Applied, thanks! Damien Zammit, le mar. 30 janv. 2024 08:04:15 +0000, a ecrit: > Clear flag in msr for xAPIC mode. > > --- > i386/i386/apic.h | 3 ++- > i386/i386/cpuboot.S | 4 ++-- > i386/i386at/boothdr.S | 3 ++- > 3 files changed, 6 insertions(+), 4 deletions(-) > > diff --git a/i386/i386/apic.h b/i386/i386/apic.h > index b8fff2af..e410e9c6 100644 > --- a/i386/i386/apic.h > +++ b/i386/i386/apic.h > @@ -302,7 +302,8 @@ extern int cpu_id_lut[]; > > #define APIC_MSR 0x1b > #define APIC_MSR_BSP 0x100 /* Processor is a BSP */ > -#define APIC_MSR_ENABLE 0x800 > +#define APIC_MSR_X2APIC 0x400 /* LAPIC is in x2APIC mode */ > +#define APIC_MSR_ENABLE 0x800 /* LAPIC is enabled */ > > /* Set or clear a bit in a 255-bit APIC mask register. > These registers are spread through eight 32-bit registers. */ > diff --git a/i386/i386/cpuboot.S b/i386/i386/cpuboot.S > index c85c4ddb..13d9160e 100644 > --- a/i386/i386/cpuboot.S > +++ b/i386/i386/cpuboot.S > @@ -175,13 +175,13 @@ _apboot: > mov apboot_idt_ptr, %ebx > lidt (%ebx) > > - /* Enable local apic */ > + /* Enable local apic in xAPIC mode */ > xorl %eax, %eax > xorl %edx, %edx > movl $APIC_MSR, %ecx > rdmsr > orl $APIC_MSR_ENABLE, %eax > - andl $(~APIC_MSR_BSP), %eax > + andl $(~(APIC_MSR_BSP | APIC_MSR_X2APIC)), %eax > movl $APIC_MSR, %ecx > wrmsr > > diff --git a/i386/i386at/boothdr.S b/i386/i386at/boothdr.S > index 6696d966..daaf57db 100644 > --- a/i386/i386at/boothdr.S > +++ b/i386/i386at/boothdr.S > @@ -67,13 +67,14 @@ boot_entry: > movl $solid_intstack+INTSTACK_SIZE-4, %esp > andl $0xfffffff0,%esp > > - /* Enable local apic */ > + /* Enable local apic in xAPIC mode */ > xorl %eax, %eax > xorl %edx, %edx > movl $APIC_MSR, %ecx > rdmsr > orl $APIC_MSR_ENABLE, %eax > orl $APIC_MSR_BSP, %eax > + andl $(~APIC_MSR_X2APIC), %eax > movl $APIC_MSR, %ecx > wrmsr > > -- > 2.43.0 > > >
-- Samuel --- Pour une évaluation indépendante, transparente et rigoureuse ! Je soutiens la Commission d'Évaluation de l'Inria.
