I changed the CC to recipients appropriate for Hurd discussion.

Yes, I've decided what to do.  In fact, I should do it already.  

It's already specified that the "thread register" is one word at %gs:0.

We can implement this now with a per-thread LDT using the existing Mach
interfaces, but I think that is overkill.  What I'm going to do is change
the standard user-mode %gs to a new special global segment that will point
to one word in user-writable memory above VM_MAX_ADDRESS.  (The
segmentation limits on the other user-usable segments prevent any other way
of writing to that page.)  For SMP, there will be a USER_GS segment on each
CPU pointing to different locations.  

Then thread switching will switch this word as if it were a register.


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