It's interesting to observe that the various architectures have different
semantics for the floating-point exception flags in the presence of traps:
* On some architectures, modifying bits in some control register does not
actually raise a trap. To raise a trap, feraiseexcept() must do an
actual floating-point operation. This is the case for
- The SSE unit of x86_64 and i386,
- arm64,
- arm,
- alpha,
- hppa,
- ia64,
- m68k,
- loongarch,
- s390,
- sh,
- sparc.
* On some architectures, setting the floating-point exception flags in
the control register *does* raise a trap:
- The 387 unit of x86_64 and i386,
- powerpc.
* On some architectures, it's something in between: mips.
Here, setting the floating-point exception flags does not raise a
trap, but setting some other bits in the same register does.
* Finally, one some architectures, raising traps is unsupported in
hardware (i.e. would require GCC modifications): riscv.
Bruno
