Hi, Sun Haiyong wrote: > * m4/stack-direction.m4 (SV_STACK_DIRECTION): When the CPU is loongarch, > set "sv_cv_stack_direction" to "-1" .
Thanks for the patch. Do you know a document which explains the ABI of this architecture (I mean: register usage, max number of arguments passed in registers, stack direction, stack alignment, etc.)? For the moment, I am only able to guess, based on [1] which says that LoongArch is basically a clone of mips64 with different encoding of the instructions. So, I've applied your patch. [1] https://www.phoronix.com/scan.php?page=news_item&px=LoongArch-MIPS-Copy-Kernel 2021-09-04 Sun Haiyong <youb...@sina.com> (tiny change) sigsegv: Improve cross-compilation support for LoongArch CPU. * m4/stack-direction.m4 (SV_STACK_DIRECTION): Assume the stack grows down on LoongArch. diff --git a/m4/stack-direction.m4 b/m4/stack-direction.m4 index 93287254b..e682be97d 100644 --- a/m4/stack-direction.m4 +++ b/m4/stack-direction.m4 @@ -1,4 +1,4 @@ -# stack-direction.m4 serial 7 +# stack-direction.m4 serial 8 dnl Copyright (C) 2002-2021 Free Software Foundation, Inc. dnl This file is free software, distributed under the terms of the GNU dnl General Public License. As a special exception to the GNU General @@ -32,6 +32,7 @@ AC_DEFUN([SV_STACK_DIRECTION], i?86 | x86_64 | \ i860 | \ ia64 | \ + loongarch* | \ m32r | \ m68* | \ m88k | \
