https://sourceware.org/bugzilla/show_bug.cgi?id=33893
Bug ID: 33893
Summary: [libopcodes] [x86-64] SSE instructions with redundant
mandatory prefix decode incorrectly
Product: binutils
Version: 2.47 (HEAD)
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: binutils
Assignee: unassigned at sourceware dot org
Reporter: jos.craaijo at ou dot nl
Target Milestone: ---
The instruction 66F30FD6E4 is decoded incorrectly by libopcodes. It is decoded
as:
movq2dq %xmm4,%xmm4
but it should be decoded as:
movq2dq %mm4,%xmm4
Note the register difference in the first operand.
I suspect the 66 prefix is somehow given priority over the F2/F3 prefixes, as
this decoding would be correct if the instruction was 660FD6E4. When both an
F2/F3 and a 66 prefix are present, priority should be given to the F2/F3
prefixes. I have checked this behavior against both Intel and AMD CPUs, as well
as Capstone, XED and Zydis. Unfortunately, I could not find a specification for
this in the reference manuals (nor any indication whether this is undefined
behavior or not). I understand if you decide to WONTFIX because of this.
This bug also happens with, for example, f2660fd0c1, which is addsubps but
libopcodes decodes as addsubpd instead.
To reproduce:
printf '\x64\x01\x04\x98' > binary.bin
binutils/objdump -b binary -mi386:x86-64 -D binary1.bin
prints: movq2dq %xmm4,%xmm4
I have confirmed this bug is still present on commit 17344baa1da, which is the
current commit in the master branch.
I have not worked with the binutils codebase before, but I am happy to try to
write and contribute a patch.
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