https://sourceware.org/bugzilla/show_bug.cgi?id=31885
Jan Beulich <jbeulich at suse dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Ever confirmed|0 |1
Last reconfirmed| |2024-12-27
--- Comment #2 from Jan Beulich <jbeulich at suse dot com> ---
So what exactly is the request here? We surely want to emit efficient code,
when the exact register size specified doesn't matter for the operation. That's
what - for some of the insns you mention - we've been doing for many years.
Some other insns were adjusted later (iirc also ARPL, which you don't mention),
to have consistent overall behavior.
With that desire of ours, what's left (afaict) is a possible new, non-default
mode where such silent adjustments wouldn't be done behind the back of the
programmer. Please clarify if that's what you're seeking. If it is, it may mean
quite a bit of extra code for very little practical gain.
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