https://sourceware.org/bugzilla/show_bug.cgi?id=32363
Bug ID: 32363
Summary: stm r13!, {...} misassembled to push {...}
Product: binutils
Version: 2.43.1
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: gas
Assignee: unassigned at sourceware dot org
Reporter: m.banaszek at mimuw dot edu.pl
Target Milestone: ---
Created attachment 15796
--> https://sourceware.org/bugzilla/attachment.cgi?id=15796&action=edit
an example (example.s)
When assembling for ARM Cortex-M3 using arm-none-eabi-as (binutils 2.43.1,
compiled on a x86-64 Linux, configured for a target of arm-none-eabi) the
instruction
stm r13!, {r0-r1,r4,r7}
is assembled to
push {r0, r1, r4, r7}
However, it is incorrect!
According to the "ARMv7-M Architecture Reference Manual" these instructions
operate differently:
- stm/stmia/stmea stores the registers to locations in memory increasing the
address in r13,
- push stores registers to locations in memory decreasing the address in r13.
In consequence, one expects that r0, r1, r4, and r7 are stored at addresses
from r13 to r13+4*4B, and r13 is updated to r13+4*4B. However, the program
stores the registers at addresses from r13-4*4B to r13, and updates r13 to
r13-4*4B.
Actually push is an equivalent to stmdb/stmfd, not stm/stmia/stmea.
Steps to reproduce:
1. Assemble: arm-none-eabi-as -mcpu=cortex-m3 -o example.o example.s
2. Disassemble: arm-none-eabi-objdump -D example.o
00000000 <.text>:
0: b493 push {r0, r1, r4, r7}
But an stm instruction is expected, e.g.:
e8ad 0093 stm.w sp!, {r0, r1, r4, r7}
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