https://sourceware.org/bugzilla/show_bug.cgi?id=25202
--- Comment #20 from Nick Clifton <nickc at redhat dot com> --- (In reply to Gökçe Aydos from comment #19) Hi Gökçe, > 1) Output is wrong if data-width>16. Does the verilog memory file format actually support widths greater than 16 ? (I have never used it, so maybe it does). And if it does, is it just theoretical, or is it actually used in real life ? > data-width=32 > > ``` > @04000000 > F5610113FF76E137EAD08093FEEDC0B7 > 7D520213BFDDB237FAB181937FBB71B7 Yes - for reasons I have not been able to track down the verilog data is handled inside the BFD library in 16-byte packets. Unless it is really necessary to support larger widths, I would prefer to leave the code as it is and just add a warning for larger values. > 2) Error message not helpful > $ ... --verilog-data-width=3 > riscv64-elf-objcopy: my.memh: invalid operation Fair enough - that should be a simple fix. Cheers Nick -- You are receiving this mail because: You are on the CC list for the bug.
