https://sourceware.org/bugzilla/show_bug.cgi?id=25550
--- Comment #3 from Jan Beulich <jbeulich at suse dot com> --- (In reply to H.J. Lu from comment #2) > (In reply to Jan Beulich from comment #1) > > However, as pointed out in the mail discussion already, consistent behavior > > should result (which currently isn't the case): > > > > 1. Since .arch generally enables prereqs for the specified ISA extension > > (like AVX for AVX512F), disabling an extension also should disable > > everything that it is considered a prereq for. > > Is SSE2 a prerequisite for AVX? This can be viewed either way, I guess. The history of the ISA extensions suggests it is. But functionally nothing except the XMM registers have any overlap, I think. > > 2. Any ISA extension enabled should be enabled completely. The main anomaly > > looks to be SSE/SSE2 insns accessing MMX registers, where strictly speaking > > the MMX ISA extension isn't a prereq to the SSE* ones (it's only the > > registers that are used), which gas also handles this way. > > For view point of assembly codes, enable MMX register without MMX ISA > makes no sense. For example, emms is needed for proper MMX usage. Not necessarily, one can certainly get away without (using 4 FFREEP in a row). -- You are receiving this mail because: You are on the CC list for the bug.
