https://sourceware.org/bugzilla/show_bug.cgi?id=21999
Bug ID: 21999
Summary: ARM: relative conditional movw/movt pairs may use
incorrect offset
Product: binutils
Version: 2.30 (HEAD)
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: gas
Assignee: unassigned at sourceware dot org
Reporter: ard.biesheuvel at linaro dot org
Target Milestone: ---
The following code
.syntax unified
.thumb
movw r0, #:lower16:foo - (1f + 4)
movt r0, #:upper16:foo - (1f + 4)
1: add r0, r0, pc
movweq r0, #:lower16:foo - (1f + 4)
movteq r0, #:upper16:foo - (1f + 4)
1: addeq r0, r0, pc
ittt eq
movweq r0, #:lower16:foo - (1f + 4)
movteq r0, #:upper16:foo - (1f + 4)
1: addeq r0, r0, pc
assembled for ARMv7 in Thumb2 mode produces the following when using
-mimplicit-it=always
0: f64f 70f4 movw r0, #65524 ; 0xfff4
4: f6cf 70f8 movt r0, #65528 ; 0xfff8
8: 4478 add r0, pc
a: bf04 itt eq
c: f64f 70f4 movweq r0, #65524 ; 0xfff4
10: f6cf 70f8 movteq r0, #65528 ; 0xfff8
14: bf08 it eq
16: 4478 addeq r0, pc
18: bf02 ittt eq
1a: f64f 70f4 movweq r0, #65524 ; 0xfff4
1e: f6cf 70f8 movteq r0, #65528 ; 0xfff8
22: 4478 addeq r0, pc
Note that the addend is incorrect for the second case: it does not take the
additional 'it' instruction in account.
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