https://sourceware.org/bugzilla/show_bug.cgi?id=21285
Cary Coutant <ccoutant at gmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Last reconfirmed| |2017-05-13
Assignee|ccoutant at gmail dot com |hjl.tools at gmail dot
com
Ever confirmed|0 |1
--- Comment #2 from Cary Coutant <ccoutant at gmail dot com> ---
OK, suppose we have the following sequence of instructions:
cmp $0x8b, %al
movl bar@GOT, %eax
mov bar@GOT(%ecx), %esp
which assemble to:
0: 3c 8b cmp $0x8b,%al
2: a1 00 00 00 00 mov 0x0,%eax
7: 8b a1 00 00 00 00 mov 0x0(%ecx),%esp
How is the linker supposed to distinguish the two mov instructions? We cannot
make this optimization based on looking at the opcodes -- we need separate
relocations to tell us which is which, unless it's OK to invalidate 0xa1 as a
valid modrm byte in this usage.
Doesn't ld have the same problem?
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