https://sourceware.org/bugzilla/show_bug.cgi?id=20247
Bug ID: 20247
Summary: AVR/ARM align causes unnecessary padding of segment
Product: binutils
Version: 2.27 (HEAD)
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: gas
Assignee: unassigned at sourceware dot org
Reporter: bg at nerilex dot org
Target Milestone: ---
Created attachment 9334
--> https://sourceware.org/bugzilla/attachment.cgi?id=9334&action=edit
assembly code to reproduce
Defining an alignment causes the corresponding section to get padded to a
multiple of the alignment value on some architectures.
I could see this behavior on:
* arm
* avr
It does not happen on x86_64.
I only tested the bss and data segment to be affected and both are.
Short code to reproduce is:
.balign 16
.skip 1
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