https://sourceware.org/bugzilla/show_bug.cgi?id=18638
Bug ID: 18638
Summary: Wrong code generated for VMOVQ and VGATHER... on x86
CPU
Product: binutils
Version: unspecified
Status: NEW
Severity: critical
Priority: P2
Component: gas
Assignee: unassigned at sourceware dot org
Reporter: m at rolle dot name
Target Milestone: ---
Two issues here, both with the binary code generated by gas. These are seen in
the testsuite files.
(1) vmovq rcx, xmm4
Generates C4 E1 FD 7E E1.
The VEX.L bit (the 8's bit of the third byte) is 1. However, AMD spec says you
must have VEX.L = 0, and in fact, VEX.L = 1 causes a #UD exception.
Intel document says the same thing.
(2) vgather...
Generates a ModR/M byte with the r/m field = 000b. However, Intel spec says
a #UD will "cause a #UD if the memory operand is encoded without the SIB byte".
I interpret this to mean that the r/m field must be 100b. AMD spec says
specifically that there is a #UD if "MODRM.rm != 100b".
I've also filed an issue suggesting that the assembled code from the testsuite
be actually executed on the appropriate CPU.
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