http://sourceware.org/bugzilla/show_bug.cgi?id=13572
Bug #: 13572
Summary: x86-32: Assembler does not accept "QWORD PTR" for
"cvttps2pi" instruction
Product: binutils
Version: 2.23 (HEAD)
Status: NEW
Severity: normal
Priority: P2
Component: gas
AssignedTo: [email protected]
ReportedBy: [email protected]
Classification: Unclassified
There is a discrepancy in binutils between the assembler and disassembler
regarding the memory size used for the 'cvttps2pi' instruction in x86-32 Intel
syntax.
The assembler accepts "XMMWORD PTR" but not "QWORD PTR":
$ cat cvttps2pi.S
.intel_syntax noprefix
cvttps2pi mm0, XMMWORD PTR [eax]
cvttps2pi mm0, QWORD PTR [eax]
$ as --32 cvttps2pi.S -o cvttps2pi.o
cvttps2pi.S: Assembler messages:
cvttps2pi.S:3: Error: ambiguous operand size or operands invalid for
`cvttps2pi'
Whereas the disassembler produces "QWORD PTR":
$ cat cvttps2pi.S
.intel_syntax noprefix
cvttps2pi mm0, XMMWORD PTR [eax]
$ as --32 cvttps2pi.S -o cvttps2pi.o
$ objdump -M intel -d cvttps2pi.o
...
0: 0f 2c 00 cvttps2pi mm0,QWORD PTR [eax]
This happens with binutils 2.20.1 and with HEAD (as of today).
The correct size seems to be "QWORD PTR", based on the AMD manual, which
specifies the instruction's memory size as "mem64":
CVTTPS2PI mmx, xmm/mem64 0F 2C /r
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