------- Additional Comments From ht at inter7 dot jp 2007-07-24 04:35 ------- Some more similar issue. REX.W is ignored. (some are incorrect bytemode)
% cat rex.w.s .text .byte 0x48, 0xF2, 0x0F, 0x2A, 0x00 .byte 0x48, 0xF3, 0x0F, 0x2A, 0x00 .byte 0x48, 0xF2, 0x0F, 0x2D, 0x00 .byte 0x48, 0xF3, 0x0F, 0x2D, 0x00 .byte 0x48, 0xF2, 0x0F, 0x2C, 0x00 .byte 0x48, 0xF3, 0x0F, 0x2C, 0x00 % as rex.w.s -o rex.w.o % objdump -dw -Mintel,x86-64 --section="LC_SEGMENT.__TEXT.__text" rex.w.o rex.w.o: file format mach-o-le Disassembly of section LC_SEGMENT.__TEXT.__text: 0000000000000000 <LC_SEGMENT.__TEXT.__text>: 0: 48 rex.W 1: f2 0f 2a 00 cvtsi2sd xmm0,DWORD PTR [rax] 5: 48 rex.W 6: f3 0f 2a 00 cvtsi2ss xmm0,DWORD PTR [rax] a: 48 rex.W b: f2 0f 2d 00 cvtsd2si eax,XMMWORD PTR [rax] f: 48 rex.W 10: f3 0f 2d 00 cvtss2si eax,XMMWORD PTR [rax] 14: 48 rex.W 15: f2 0f 2c 00 cvttsd2si eax,XMMWORD PTR [rax] 19: 48 rex.W 1a: f3 0f 2c 00 cvttss2si eax,XMMWORD PTR [rax] Intel CPU manual writes: Opcode Instruction REX.W + F2 0F 2A /r CVTSI2SD xmm, r/m64 REX.W + F3 0F 2A /r CVTSI2SS xmm, r/m64 REX.W + F2 0F 2D /r CVTSD2SI r64, xmm/m64 REX.W + F3 0F 2D /r CVTSS2SI r64, xmm/m32 REX.W + F2 0F 2C /r CVTTSD2SI r64, xmm/m64 REX.W + F3 0F 2C /r CVTTSS2SI r64, xmm/m32 -- http://sourceware.org/bugzilla/show_bug.cgi?id=4835 ------- You are receiving this mail because: ------- You are on the CC list for the bug, or are watching someone who is. _______________________________________________ bug-binutils mailing list bug-binutils@gnu.org http://lists.gnu.org/mailman/listinfo/bug-binutils
