On 11/29/12 10:24 PM, "Mark Hahn" <[email protected]> wrote:
> >samsung has been producing stacked chips for quite a while - >back to at least the a5 generation, probably before that >(stacked dram, stacked flash too I think.) > >> The interesting part about forthcoming real (TSV) stacking >> that you can mix hybrid memories, whether SRAM, MRAM, DRAM, flash, >> as you don't have to be process compatible as with true embedded >> memory (though MRAM might well be process compatible with CPUs). > >stacking is great, but not that much different from MCMs, is it? > There's also the techniques from places like 3dplus, which basically take off the shelf parts and stack them after machining the packages a bit and sticking what amounts to a tiny PCB on each side with the interconnects. But... Any time you go from "die" to "outside world" the assumption is that you're going to be transforming from some internal logic level and impedance to something moderately standard in the outside world (e.g. LVDS, 3.3VTLL, etc.) that's slow and power costly. Even if you go die to die (as in a MCM or thick film hybrid) you're still faced with this issue. > _______________________________________________ Beowulf mailing list, [email protected] sponsored by Penguin Computing To change your subscription (digest mode or unsubscribe) visit http://www.beowulf.org/mailman/listinfo/beowulf
