Found some details on the Nehalem EX:
http://www.semiaccurate.com/2009/08/25/intel-details-becton-8-cores-and-
all/


Internal ring buses? How long till you lot are benchmarking them and
claiming your
code is taking too long because the data is moving round the bus in the
wrong direction :-)


I thought understanding L1, 2 and 3 caches was hard enough, without
having to think about rings.
Ah well.  Toroids on chip next?

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