Rgb wrote: > > I understand inductive surge when powering up, I understand in detail > browning out a primary power transformer, but I think those are > different issues and irrelevant here. Inductive surge -> magnetizing current in large iron core inductors (depends on where you are in line frequency cycle at "switch on") Sag from overload -> impedance (both R and L) in transformer and wires from transformer to load. 2% voltage drop is the NEC guideline for "in premises wires".. From panel to load. The voltage at the utility entrance could probably be +/- 5% at any given time.
> > So far, using my trusty Kill-a-Watt on real world nodes, I haven't seen > more than a 30% differential draw loaded to unloaded. Large parts of > the CPU require power at all times to function. Memory, for example, > both on and offboard. Nearly everything inside a computer has a > nontrivial idle draw, plus (sure) peak draw when it or one of its > subsystems are in use. Very much true. DRAM needs refresh, for instance. > > Exceptions are modern laptops -- with variable speed clocks, they draw > much less idling than they do at speed, in part because power (idle or > otherwise) IS very nearly proportional to CPU clock in at least parts of > the system. And I don't really know how the latest designs do in this > > Multicores, of course, may function like hybrid cars, and somehow run > more nearly idle when they are idle. But I'd have to hear from someone > who slapped a KaW on an actual system and clocked it from idle (solidly > post-boot, running the OS, at idle "equilibrium") to loaded (running > flat out on e.g. a benchmark suite that loads all cores and/or the > memory etc.). Has anyone actually done this and observed (say) a 2 or 3 > to 1 increase in power draw loaded to idle? 50W idle to 200W loaded in > 1 second? 150W idle to 200W loaded is more like what I've seen... Don't forget that the power supply efficiency drops dramatically when DC load drops, too. They don't spend a penny more on sophisticated design than required to get that "energy star" rating, and that has more to do with having a good "low power hibernate" mode than good efficiency at 25% load. > >> In normal practice I doubt that this is an issue but synchronization in the >> extreme is interesting in its details and side effects. > > I completely agree with this, both parts. Although if one IS bumping > from 50->200W "instantly" on not even an entire cluster but just all the > nodes on a single circuit, that's popping over a KW on a 20A line -- > ballpark where one MIGHT see something inductive (although as I said, > probably nothing that the power supply capacitor(s) cannot buffer, > although I'm too tired to compute the number of joules (watt-seconds) > one can probably deliver and what RC probably is, etc). Popping > multiple (as in 10+) KW in less than a 60 Hz cycle would very likely be > hard on the primary, no doubt about it. If one considers that a single wire is about 1 uH/meter (typical electrical wiring will be much less, because it's a pair, with currents flowing opposite directions), the series L might be a few tens of uH. At, say, 20 A, there's just not much energy stored there. _______________________________________________ Beowulf mailing list, Beowulf@beowulf.org To change your subscription (digest mode or unsubscribe) visit http://www.beowulf.org/mailman/listinfo/beowulf
