This means that 2 additional FP results per cycle in microarchitecture gives only about 7% of performance increase :-(

the 4 flops/cycle is really for linpack-like code: it assumes you are executing packed double SIMD.

The question is - should we wait some better results for new incoming optimizing compilers versions ? Or it is the reality - that 2 additional FP results per cycle gives (in average) relative small performance increase ?

just that not all FP is SIMD-friendly, I think. if your code spends a lot of time in blas/lapack functions, I would expect it to see good speedup.

regards, mark hahn.
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