> Didn't see anyone post this link regarding Aegia Physix processor. It is the
> most comprehensive write up I have seen.
>
> http://www.blachford.info/computer/articles/PhysX1.html
yes, and even so it's not very helpful. "fabric connecting compute and
memory elements" pretty well covers it! the block diagram they give
could almost apply directly to Cell, for instance.
fundamentally, about these cell/aegia/gpu/fpga approaches,
you have to ask:
- how cheap will it be in final, off-the-shelf systems? GPUs
are most attractive this way, since absurd gaming cards have
become a check-off even on corporate PCs (and thus high volume.)
it's unclear to me whether Cell will go into any million-unit
products other than dedicated game consoles.
- does it run efficiently-enough? most sci/eng I see is pretty
firmly based on 64b FP, often with large data. but afaikt,
Cell (eg) doesn't do well on anything but in-cache 32b FP.
GPUs have tantalizingly high local-mem bandwidth, but also
don't really do anything higher than 32b.
- how much time will it take to adapt to the peculiar programming
model necessary for the device? during the time spent on that,
what will happen to the general-pupose CPU market?
I think price, performance and time-to-market are all stacked against this
approach, at least for academic/research HPC. it would be different if the
general-purpose CPU market stood still, or if there were no way to scale up
existing clusters...
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