From: Pan Xiuli <[email protected]> After refine subnr, we need to change all of the subnr usage in seleciton level. Refine the optimize element calculate and some regs compare. Also refine the output about subnr.
Contributor: Yang Rong <[email protected]> Signed-off-by: Pan Xiuli <[email protected]> --- backend/src/backend/gen_insn_selection_optimize.cpp | 7 ++++--- backend/src/backend/gen_insn_selection_output.cpp | 2 +- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/backend/src/backend/gen_insn_selection_optimize.cpp b/backend/src/backend/gen_insn_selection_optimize.cpp index eac0f36..048c28b 100644 --- a/backend/src/backend/gen_insn_selection_optimize.cpp +++ b/backend/src/backend/gen_insn_selection_optimize.cpp @@ -22,7 +22,7 @@ namespace gbe uint32_t height = execWidth / width; uint32_t vstride = GenRegister::vstride_size(reg); uint32_t hstride = GenRegister::hstride_size(reg); - uint32_t base = reg.subnr; + uint32_t base = reg.nr * GEN_REG_SIZE + reg.subnr; for (uint32_t i = 0; i < height; ++i) { uint32_t offsetInByte = base; for (uint32_t j = 0; j < width; ++j) { @@ -132,7 +132,7 @@ namespace gbe for (ReplaceInfoMap::iterator pos = replaceInfoMap.begin(); pos != replaceInfoMap.end(); ++pos) { ReplaceInfo* info = pos->second; if (info->intermedia.reg() == var.reg()) { //intermedia is overwritten - if (info->intermedia.quarter == var.quarter && info->intermedia.subnr == var.subnr) { + if (info->intermedia.quarter == var.quarter && info->intermedia.subnr == var.subnr && info->intermedia.nr == var.nr) { // We need to check the if intermedia is fully overwritten, they may be in some prediction state. if (CanBeReplaced(info, insn, var)) doReplacement(info); @@ -207,7 +207,8 @@ namespace gbe if (info->insn.state.inversePredicate != insn.state.inversePredicate) return false; - if (info->intermedia.type == var.type && info->intermedia.quarter == var.quarter && info->intermedia.subnr == var.subnr) { + if (info->intermedia.type == var.type && info->intermedia.quarter == var.quarter && + info->intermedia.subnr == var.subnr && info->intermedia.nr == var.nr) { uint32_t elements = CalculateElements(var, insn.state.execWidth); //considering width, hstrid, vstrid and execWidth if (info->elements == elements) return true; diff --git a/backend/src/backend/gen_insn_selection_output.cpp b/backend/src/backend/gen_insn_selection_output.cpp index ae396f3..f23e8c8 100644 --- a/backend/src/backend/gen_insn_selection_output.cpp +++ b/backend/src/backend/gen_insn_selection_output.cpp @@ -45,7 +45,7 @@ namespace gbe cout << "(abs)"; cout << "%" << reg.value.reg; if (reg.subphysical) - cout << "." << reg.subnr; + cout << "." << reg.subnr + reg.nr * GEN_REG_SIZE; if (dst) cout << "<" << GenRegister::hstride_size(reg) << ">"; -- 2.7.4 _______________________________________________ Beignet mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/beignet
