This patchset LGTM, will push latter.
On Mon, Jun 09, 2014 at 11:29:47PM +0800, Yang Rong wrote: > HSW add new data port, add support in diassemble. > > V2: seperate HSW and IVB's send msg function table, so need pass deviceID to > gen_disasm. > Signed-off-by: Yang Rong <[email protected]> > --- > backend/src/backend/gen/gen_mesa_disasm.c | 66 > ++++++++++++++++++++++++++----- > backend/src/backend/gen/gen_mesa_disasm.h | 2 +- > backend/src/backend/gen_context.cpp | 6 +-- > backend/src/backend/gen_program.cpp | 6 +-- > backend/src/backend/gen_program.hpp | 5 ++- > 5 files changed, 67 insertions(+), 18 deletions(-) > > diff --git a/backend/src/backend/gen/gen_mesa_disasm.c > b/backend/src/backend/gen/gen_mesa_disasm.c > index 81c33a6..9c1e37a 100644 > --- a/backend/src/backend/gen/gen_mesa_disasm.c > +++ b/backend/src/backend/gen/gen_mesa_disasm.c > @@ -49,6 +49,7 @@ > #include <assert.h> > > #include "backend/gen_defs.hpp" > +#include "src/cl_device_data.h" > > static const struct { > const char *name; > @@ -319,6 +320,20 @@ static const char *target_function_gen6[16] = { > [GEN_SFID_DATAPORT_DATA_CACHE] = "data" > }; > > +static const char *target_function_gen75[16] = { > + [GEN_SFID_NULL] = "null", > + [GEN_SFID_MATH] = "math", > + [GEN_SFID_SAMPLER] = "sampler", > + [GEN_SFID_MESSAGE_GATEWAY] = "gateway", > + [GEN_SFID_URB] = "urb", > + [GEN_SFID_THREAD_SPAWNER] = "thread_spawner", > + [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler", > + [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render", > + [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const", > + [GEN_SFID_DATAPORT_DATA_CACHE] = "data (0)", > + [GEN_SFID_DATAPORT1_DATA_CACHE] = "data (1)" > +}; > + > static const char *gateway_sub_function[8] = { > [0] = "open gateway", > [1] = "close gateway", > @@ -414,6 +429,21 @@ static const char *data_port_data_cache_msg_type[] = { > [13] = "Untyped Surface Write", > }; > > +static const char *data_port1_data_cache_msg_type[] = { > + [1] = "Untyped Surface Read", > + [2] = "Untyped Atomic Operation", > + [3] = "Untyped Atomic Operation SIMD4x2", > + [4] = "Media Block Read", > + [5] = "Typed Surface Read", > + [6] = "Typed Atomic Operation", > + [7] = "Typed Atomic Operation SIMD4x2", > + [9] = "Untyped Surface Write", > + [10] = "Media Block Write", > + [11] = "Atomic Counter Operation", > + [12] = "Atomic Counter Operation 4X2", > + [13] = "Typed Surface Write", > +}; > + > static int column; > > static int string (FILE *file, const char *string) > @@ -1060,12 +1090,17 @@ static int qtr_ctrl(FILE *file, const union > GenNativeInstruction *inst) > return 0; > } > > -int gen_disasm (FILE *file, const void *opaque_insn) > +int gen_disasm (FILE *file, const void *opaque_insn, uint32_t deviceID) > { > const union GenNativeInstruction *inst = (const union GenNativeInstruction > *) opaque_insn; > int err = 0; > int space = 0; > - int gen = 7; > + int gen; > + if (IS_IVYBRIDGE(deviceID)) { > + gen = 70; > + } else if (IS_HASWELL(deviceID)) { > + gen = 75; > + } > > if (inst->header.predicate_control) { > string (file, "("); > @@ -1106,7 +1141,7 @@ int gen_disasm (FILE *file, const void *opaque_insn) > string (file, ")"); > } > > - if (inst->header.opcode == GEN_OPCODE_SEND && gen < 6) > + if (inst->header.opcode == GEN_OPCODE_SEND && gen < 60) > format (file, " %d", inst->header.destreg_or_condmod); > > if (opcode[inst->header.opcode].nsrc == 3) { > @@ -1125,14 +1160,14 @@ int gen_disasm (FILE *file, const void *opaque_insn) > if (opcode[inst->header.opcode].ndst > 0) { > pad (file, 16); > err |= dest (file, inst); > - } else if (gen >= 6 && (inst->header.opcode == GEN_OPCODE_IF || > + } else if (gen >= 60 && (inst->header.opcode == GEN_OPCODE_IF || > inst->header.opcode == GEN_OPCODE_ELSE || > inst->header.opcode == GEN_OPCODE_ENDIF || > inst->header.opcode == GEN_OPCODE_WHILE || > inst->header.opcode == GEN_OPCODE_BRD || > inst->header.opcode == GEN_OPCODE_JMPI)) { > format(file, " %d", (int16_t)inst->bits3.gen7_branch.jip); > - } else if (gen >= 6 && (inst->header.opcode == GEN_OPCODE_BREAK || > + } else if (gen >= 60 && (inst->header.opcode == GEN_OPCODE_BREAK || > inst->header.opcode == GEN_OPCODE_CONTINUE || > inst->header.opcode == GEN_OPCODE_HALT || > inst->header.opcode == GEN_OPCODE_BRC)) { > @@ -1159,8 +1194,13 @@ int gen_disasm (FILE *file, const void *opaque_insn) > pad (file, 16); > space = 0; > > - err |= control (file, "target function", target_function_gen6, > - target, &space); > + if(gen == 75) { > + err |= control (file, "target function", target_function_gen75, > + target, &space); > + } else { > + err |= control (file, "target function", target_function_gen6, > + target, &space); > + } > > switch (target) { > case GEN_SFID_MATH: > @@ -1199,6 +1239,14 @@ int gen_disasm (FILE *file, const void *opaque_insn) > > data_port_scratch_msg_type[inst->bits3.gen7_scratch_rw.msg_type]); > } > break; > + case GEN_SFID_DATAPORT1_DATA_CACHE: > + format (file, " (bti: %d, rgba: %d, %s, %s, %s)", > + inst->bits3.gen7_untyped_rw.bti, > + inst->bits3.gen7_untyped_rw.rgba, > + > data_port_data_cache_simd_mode[inst->bits3.gen7_untyped_rw.simd_mode], > + > data_port_data_cache_category[inst->bits3.gen7_untyped_rw.category], > + > data_port1_data_cache_msg_type[inst->bits3.gen7_untyped_rw.msg_type]); > + break; > case GEN6_SFID_DATAPORT_CONSTANT_CACHE: > format (file, " (bti: %d, %s)", > inst->bits3.gen7_dword_rw.bti, > @@ -1225,7 +1273,7 @@ int gen_disasm (FILE *file, const void *opaque_insn) > string (file, "{"); > space = 1; > err |= control(file, "access mode", access_mode, > inst->header.access_mode, &space); > - if (gen >= 6) > + if (gen >= 60) > err |= control (file, "write enable control", wectrl, > inst->header.mask_control, &space); > else > err |= control (file, "mask control", mask_ctrl, > inst->header.mask_control, &space); > @@ -1233,7 +1281,7 @@ int gen_disasm (FILE *file, const void *opaque_insn) > > err |= qtr_ctrl (file, inst); > err |= control (file, "thread control", thread_ctrl, > inst->header.thread_control, &space); > - if (gen >= 6) > + if (gen >= 60) > err |= control (file, "acc write control", accwr, > inst->header.acc_wr_control, &space); > if (inst->header.opcode == GEN_OPCODE_SEND || > inst->header.opcode == GEN_OPCODE_SENDC) > diff --git a/backend/src/backend/gen/gen_mesa_disasm.h > b/backend/src/backend/gen/gen_mesa_disasm.h > index 6185061..ca2ba2d 100644 > --- a/backend/src/backend/gen/gen_mesa_disasm.h > +++ b/backend/src/backend/gen/gen_mesa_disasm.h > @@ -34,7 +34,7 @@ > extern "C" { > #endif /* __cplusplus */ > > -extern int gen_disasm(FILE *file, const void *opaque_insn); > +extern int gen_disasm(FILE *file, const void *opaque_insn, uint32_t > deviceID); > > #ifdef __cplusplus > } > diff --git a/backend/src/backend/gen_context.cpp > b/backend/src/backend/gen_context.cpp > index 7a0a806..56f0c43 100644 > --- a/backend/src/backend/gen_context.cpp > +++ b/backend/src/backend/gen_context.cpp > @@ -1889,10 +1889,10 @@ namespace gbe > pCom = (GenCompactInstruction*)&p->store[insnID]; > if(pCom->bits1.cmpt_control == 1) { > decompactInstruction(pCom, &insn); > - gen_disasm(stdout, &insn); > + gen_disasm(stdout, &insn, deviceID); > insnID++; > } else { > - gen_disasm(stdout, &p->store[insnID]); > + gen_disasm(stdout, &p->store[insnID], deviceID); > insnID = insnID + 2; > } > } > @@ -1902,7 +1902,7 @@ namespace gbe > } > > Kernel *GenContext::allocateKernel(void) { > - return GBE_NEW(GenKernel, name); > + return GBE_NEW(GenKernel, name, deviceID); > } > > } /* namespace gbe */ > diff --git a/backend/src/backend/gen_program.cpp > b/backend/src/backend/gen_program.cpp > index d2e95d4..bd12f15 100644 > --- a/backend/src/backend/gen_program.cpp > +++ b/backend/src/backend/gen_program.cpp > @@ -41,8 +41,8 @@ > > namespace gbe { > > - GenKernel::GenKernel(const std::string &name) : > - Kernel(name), insns(NULL), insnNum(0) > + GenKernel::GenKernel(const std::string &name, uint32_t deviceID) : > + Kernel(name), deviceID(deviceID), insns(NULL), insnNum(0) > {} > GenKernel::~GenKernel(void) { GBE_SAFE_DELETE_ARRAY(insns); } > const char *GenKernel::getCode(void) const { return (const char*) insns; } > @@ -61,7 +61,7 @@ namespace gbe { > setbuffer(f, buf, 4096); > > for (uint32_t i = 0; i < insnNum; i++) { > - gen_disasm(f, insns+i); > + gen_disasm(f, insns+i, deviceID); > outs << buf; > fflush(f); > setbuffer(f, NULL, 0); > diff --git a/backend/src/backend/gen_program.hpp > b/backend/src/backend/gen_program.hpp > index ea54b49..da96aa0 100644 > --- a/backend/src/backend/gen_program.hpp > +++ b/backend/src/backend/gen_program.hpp > @@ -37,7 +37,7 @@ namespace gbe > { > public: > /*! Create an empty kernel with the given name */ > - GenKernel(const std::string &name); > + GenKernel(const std::string &name, uint32_t deviceID); > /*! Destroy it */ > virtual ~GenKernel(void); > /*! Implements base class */ > @@ -48,6 +48,7 @@ namespace gbe > virtual size_t getCodeSize(void) const; > /*! Implements printStatus*/ > virtual void printStatus(int indent, std::ostream& outs); > + uint32_t deviceID; //!< Current device ID > GenInstruction *insns; //!< Instruction stream > uint32_t insnNum; //!< Number of instructions > GBE_CLASS(GenKernel); //!< Use custom allocators > @@ -67,7 +68,7 @@ namespace gbe > virtual Kernel *compileKernel(const ir::Unit &unit, const std::string > &name, bool relaxMath); > /*! Allocate an empty kernel. */ > virtual Kernel *allocateKernel(const std::string &name) { > - return GBE_NEW(GenKernel, name); > + return GBE_NEW(GenKernel, name, deviceID); > } > /*! Use custom allocators */ > GBE_CLASS(GenProgram); > -- > 1.8.3.2 > > _______________________________________________ > Beignet mailing list > [email protected] > http://lists.freedesktop.org/mailman/listinfo/beignet _______________________________________________ Beignet mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/beignet
