Atomic instruction is both read/write instruction, we need to take care of it in the instruction scheduling.
Signed-off-by: Zhigang Gong <[email protected]> --- backend/src/backend/gen_insn_scheduling.cpp | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/backend/src/backend/gen_insn_scheduling.cpp b/backend/src/backend/gen_insn_scheduling.cpp index 6f37ed4..578db58 100644 --- a/backend/src/backend/gen_insn_scheduling.cpp +++ b/backend/src/backend/gen_insn_scheduling.cpp @@ -486,6 +486,10 @@ namespace gbe const uint32_t index = tracker.getIndex(insn.extra.function); tracker.addDependency(node, index, READ_AFTER_WRITE); } + if (insn.opcode == SEL_OP_ATOMIC) { + const uint32_t index = tracker.getIndex(insn.extra.elem); + tracker.addDependency(node, index, READ_AFTER_WRITE); + } //read-after-write of scratch memory if (insn.opcode == SEL_OP_UNSPILL_REG) { const uint32_t index = tracker.getIndex(0xff); @@ -519,6 +523,10 @@ namespace gbe const uint32_t index = tracker.getIndex(insn.extra.function); tracker.addDependency(node, index, WRITE_AFTER_WRITE); } + if (insn.opcode == SEL_OP_ATOMIC) { + const uint32_t index = tracker.getIndex(insn.extra.elem); + tracker.addDependency(node, index, WRITE_AFTER_WRITE); + } // write-after-write in scratch memory if (insn.opcode == SEL_OP_SPILL_REG) { @@ -549,6 +557,10 @@ namespace gbe const uint32_t index = tracker.getIndex(insn.extra.function); tracker.addDependency(index, node, WRITE_AFTER_READ); } + if (insn.opcode == SEL_OP_ATOMIC) { + const uint32_t index = tracker.getIndex(insn.extra.elem); + tracker.addDependency(index, node, WRITE_AFTER_READ); + } // write-after-read in scratch memory if (insn.opcode == SEL_OP_UNSPILL_REG) { -- 1.8.3.2 _______________________________________________ Beignet mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/beignet
