Thanks Dennis. That is in sync with my research. On Friday, April 9, 2021 at 2:00:07 PM UTC-4 Dennis Bieber wrote:
> On Fri, 9 Apr 2021 09:30:53 -0700 (PDT), in > gmane.comp.hardware.beagleboard.user Walter Cromer > <walterc-2dFtBuzUeF/[email protected]> wrote: > > >We are still experimenting but our preliminary calculations lead us to > >believe a reading every 50 microseconds will be sufficient. We can > probably > >get by with 100 microseconds if we have to but I think the BBBw can > easily > >sample at this rate, right? > > Well, the SoC reference (SPRS717J) indicates that the ADC should be > capable of 200K samples per second. If I haven't flubbed the math, that > appears to come down to one sample every 5us. > > As I recall, the PRU runs on a 200MHz clock, and PRU instructions, for > the most, run in one clock cycle. Should be enough cycles per sample to > handle processing <G> > > Of course, it may matter how you have the ADC programmed. > > > > -- > Dennis L Bieber > > -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/beagleboard/44d5f47f-973d-4b08-bcdb-d93e0e6c3f70n%40googlegroups.com.
