On Fri, Oct 28, 2016 at 8:03 AM, Aparna Velampudi
<[email protected]> wrote:
> I tried doing that and this happened.
>
>
> [ 0.000000] Kernel command line: console=ttyO0,115200n8
> root=UUID=5df5404c-a947-481b-8730-2a4bb771d33e ro rootfstype=ext4 rootwait
> coherent_pool=1M quiet cape_universal=enable
> [ 3.925552] bone_capemgr bone_capemgr: Baseboard:
> 'A335BNLT,BBG1,BBG116044309'
> [ 3.925587] bone_capemgr bone_capemgr:
> compatible-baseboard=ti,beaglebone-black - #slots=4
> [ 3.967034] bone_capemgr bone_capemgr: slot #0: '4D 7.0 LCD CAPE-
> 4DCAPE-70T ,00A3,4D SYSTEMS ,BB-BONE-LCD7-01'
> [ 4.022910] bone_capemgr bone_capemgr: slot #1: No cape found
> [ 4.082877] bone_capemgr bone_capemgr: slot #2: No cape found
> [ 4.112856] bone_capemgr bone_capemgr: slot #3: 'TT3201 CAN Bus
> Cape,05,TowerTech,TT3201-001'
> [ 4.113369] bone_capemgr bone_capemgr: initialized OK.
> [ 4.136126] bone_capemgr bone_capemgr: slot #3: Failed to resolve tree
> [ 4.169402] bone_capemgr bone_capemgr: slot #3: Failed to resolve tree
> [ 4.177396] bone_capemgr bone_capemgr: slot #0: dtbo
> 'BB-BONE-LCD7-01-00A3.dtbo' loaded; overlay id #0
> [ 4.184870] bone_capemgr bone_capemgr: loader: failed to load slot-3
> TT3201-001:05 (prio 0)
> [ 14.661534] bone_capemgr bone_capemgr: part_number 'GPIO-Test', version
> 'N/A'
> [ 14.661571] bone_capemgr bone_capemgr: slot #4: override
> [ 14.661588] bone_capemgr bone_capemgr: Using override eeprom data at slot
> 4
> [ 14.661605] bone_capemgr bone_capemgr: slot #4: 'Override Board
> Name,00A0,Override Manuf,GPIO-Test'
>
>
> It also shows the following error:
>
> [ 4.130051] of_resolve_phandles: Could not find symbol 'gpio4'
> [ 4.136126] bone_capemgr bone_capemgr: slot #3: Failed to resolve tree
>
> .DTS file for TT3201-001-05:
>
> (with P9.27 as itself -- on the LCD overlay, i've changed it to P9.11)
>
> /*
> * Copyright (C) 2013 Tower Technologies
> * Written by Alessandro Zummo <[email protected]>
> *
> * This program is free software; you can redistribute it and/or modify
> * it under the terms of the GNU General Public License version 2 as
> * published by the Free Software Foundation.
> */
> /dts-v1/;
> /plugin/;
>
>
> / {
> compatible = "ti,beaglebone", "ti,beaglebone-black";
> part-number = "TT3201-001";
> version = "01";
>
> /* state the resources this cape uses */
> exclusive-use =
> /* the pin header uses */
> "P9.27", /* spi irq: gpio3_19 */
> "P9.23", /* spi irq: gpio1_17 */
> "P9.31", /* spi: spi1_sclk */
> "P9.29", /* spi: spi1_d0 */
> "P9.30", /* spi: spi1_d1 */
> "P9.28", /* spi: spi1_cs0 */
> "P9.42", /* spi: spi1_cs1 */
> "P9.26", /* dcan1: dcan1_tx */
> "P9.24", /* dcan1: dcan1_rx */
> /* the hardware IP uses */
> "gpio3_19",
> "gpio1_17",
> "spi1",
> "dcan1";
>
> fragment@0 {
> target = <&am33xx_pinmux>;
> __overlay__ {
>
> bone_tt3201_dcan1_pins: bone_tt3201_dcan1_pins {
> pinctrl-single,pins = <
> 0x180 0x02 /* uart1_rxd.d_can1_tx", OUTPUT | MODE2 */
> 0x184 0x32 /* uart1_txd.d_can1_rx", INPUT_PULLUP | MODE2 */
>>;
> };
>
> bone_tt3201_spi1_pins: pinmux_bone_tt3201_spi1_pins {
> pinctrl-single,pins = <
> 0x190 0x33 /* mcasp0_aclkx.spi1_sclk, RX_ENABLED | PULLUP | MODE3 */
> 0x194 0x33 /* mcasp0_fsx.spi1_d0, RX_ENABLED | PULLUP | MODE3 */
> 0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
> 0x19c 0x13 /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */
> 0x164 0x12 /* ecap0_in_pwm0_out.spi1_cs1, OUTPUT_PULLUP | MODE2 */
>>;
> };
>
> bone_tt3201_mcp2515_0_pins: pinmux_bone_tt3201_0_mcp2515_pins {
> pinctrl-single,pins = <
> 0x1a4 0x37 /* mcasp0_fsr.gpio3_19, RX_ENABLED | PULLUP | MODE7 */
>>;
> };
>
> bone_tt3201_mcp2515_1_pins: pinmux_bone_tt3201_1_mcp2515_pins {
> pinctrl-single,pins = <
> 0x044 0x37 /* gpmc_a1.gpio1_17, RX_ENABLED | PULLUP | MODE7 */
>>;
> };
> };
> };
>
> fragment@1 {
> target = <&spi1>;
>
> __overlay__ {
> #address-cells = <1>;
> #size-cells = <0>;
>
> status = "okay";
> pinctrl-names = "default";
> pinctrl-0 = <&bone_tt3201_spi1_pins>;
>
> cs-gpios = <&gpio4 17 0>, <&gpio1 7 0>;
double check these...
>
> mcp2515@0 {
>
> compatible = "microchip,mcp2515";
> reg = <1>; /* cs1 */
> mode = <0>;
>
> spi-max-frequency = <10000000>;
>
> pinctrl-names = "default";
> pinctrl-0 = <&bone_tt3201_mcp2515_1_pins>;
>
> interrupt-parent = <&gpio2>;
interrupt-parent = <&gpio1>;
> interrupts = <17>;
>
> mcp251x,oscillator-frequency = <16000000>;
> mcp251x,irq-gpios = <&gpio2 17 0>;
mcp251x,irq-gpios = <&gpio1 17 0>;
> mcp251x,stay-awake = <1>;
> };
>
> mcp2515@1 {
>
> compatible = "microchip,mcp2515";
> reg = <0>; /* cs0 */
> mode = <0>;
>
> spi-max-frequency = <10000000>;
>
> pinctrl-names = "default";
> pinctrl-0 = <&bone_tt3201_mcp2515_0_pins>;
>
> interrupt-parent = <&gpio4>;
interrupt-parent = <&gpio3>;
> interrupts = <19>;
>
> mcp251x,oscillator-frequency = <16000000>;
> mcp251x,irq-gpios = <&gpio4 19 0>;
mcp251x,irq-gpios = <&gpio3 19 0>;
> mcp251x,stay-awake = <1>;
> mcp251x,enable-clkout = <1>;
> };
> };
> };
>
> fragment@2 {
> target = <&dcan1>;
> __overlay__ {
> status = "okay";
> pinctrl-names = "default";
> pinctrl-0 = <&bone_tt3201_dcan1_pins>;
> };
> };
> };
>
>
> GENERAL QUESTION: If I modify the overlay without changing anything in the
> EEPROM, will the cape still work?
Wrong question...
The EEPROM on the cape just has an identifier value, this value is
used to auto-load a specific "named" cape.
Regards,
--
Robert Nelson
https://rcn-ee.com/
--
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