Those banks have the clock disabled by default. Exporting a pin in both
banks 2 and 3 will bring them back on-line.
On 5/26/2015 12:58 PM, Jared McIntyre wrote:
I'm having an issue when accessing the GPIO 2 and 3 registers through
/dev/mem. Here is a snippet of the related code:
|
__off_t GPIO_REGISTER_OFFSETS[]={
0x44E07000,// GPIO 0
0x4804C000,// GPIO 1
0x481AC000,// GPIO 2
0x481AE000// GPIO 3
};
// Offsets within the GPIO Register
#defineGPIO_MEM_LENGTH 0xfff
#defineGPIO_OE 0x134
#defineGPIO_DATAIN 0x138
#defineGPIO_DATAOUT 0x13C
#defineGPIO_CLEARDATAOUT 0x190
#defineGPIO_SETDATAOUT 0x194
structGPIO_LAYOUT
{
intfd;
uint8_t *gpio_addr;
uint32_t *gpio_oe_addr;
uint32_t *gpio_setdataout_addr;
uint32_t *gpio_cleardataout_addr;
uint32_t *gpio_dataout_addr;
uint32_t *gpio_datain_addr;
}GPIO_Layouts[4];
intfd;
GPIOManager::GPIOManager()
{
fd =open("/dev/mem",O_RDWR);
//printf("Mapping %X - %X (size: %X)\n", GPIO1_START_ADDR,
GPIO1_END_ADDR, GPIO1_SIZE);
for(size_t gpio =0;gpio <4;++gpio)
{
GPIO_LAYOUT&mux =GPIO_Layouts[gpio];
mux.gpio_addr =(uint8_t*)mmap(0,GPIO_MEM_LENGTH,PROT_READ
|PROT_WRITE,MAP_SHARED,fd,GPIO_REGISTER_OFFSETS[gpio]);
if(mux.gpio_addr ==MAP_FAILED)
{
throwMSC_EXCEPTION("Unable to map texpr PIO");
}
mux.gpio_oe_addr =(uint32_t *)(mux.gpio_addr +GPIO_OE);
mux.gpio_setdataout_addr =(uint32_t *)(mux.gpio_addr
+GPIO_SETDATAOUT);
mux.gpio_cleardataout_addr =(uint32_t *)(mux.gpio_addr
+GPIO_CLEARDATAOUT);
mux.gpio_dataout_addr =(uint32_t *)(mux.gpio_addr +GPIO_DATAOUT);
mux.gpio_datain_addr =(uint32_t *)(mux.gpio_addr +GPIO_DATAIN);
// !!! Crash occurs here when gpio == 2
unsignedinttemp =*mux.gpio_addr;
}
}
|
The last line will crash when dereferencing any memory location for
gpio 2 and 3 though the mmap appears to be successful. Any thoughts? I
am running with root permissions.
--
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--
Chad Baker Memphis, TN
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