Thanks Denis,
you are right.

I've been mixing configuration register offsets and their names. But I've 
managed finally to get it right.

It would help if the conf_* registers were predefined in the header and 
cape DTS files would use that defines.

Best regards,
Miero


On Monday, April 7, 2014 5:41:52 PM UTC+2, Dennis Cote wrote:
>
>
>
> On Sunday, April 6, 2014 4:47:25 AM UTC-6, Miroslav Rudišin wrote:
>>
>> It is false, because clock control is on gpio3[21].
>>
>>
> Hi Miroslav,
>
> You might want to double check what you are doing here. The clock control 
> is on gpio1_27 as shown on page 3 of the schematic. Pin V17 is hardwired to 
> the output enable of the 24.576 MHz oscillator. It can turn the oscillator 
> on or off. This output must be turned on to use the HDMI audio.
>
> Gpio3_21 is connected to the oscillator output and used as a high speed 
> clock input when the SOC is driving audio to the HDMI framer. If the 
> oscillator output is disabled by gpio1_27 then the gpio3_21 pin can be used 
> for other functions. 
>
> HTH
> Dennis Cote
>

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