OK, it seems my counter/prescaler settings for initial and reload
count value are ignored or used for first shot only, so it seems
something is wrong in my initialisation code:
DMTimer2ModuleClkConfig();
IntMasterIRQEnable();
IntAINTCInit();
IntRegister(SYS_INT_TINT2, isr_func);
IntPrioritySet(SYS_INT_TINT2, 0, AINTC_HOSTINT_ROUTE_IRQ);
IntSystemEnable(SYS_INT_TINT2);
/* Load the counter with the initial count value */
DMTimerCounterSet(SOC_DMTIMER_2_REGS,0xFFFFFFF9);
/* Load the load register with the reload count value */
DMTimerReloadSet(SOC_DMTIMER_2_REGS, 0xFFFFFFF9);
/* Configure the DMTimer for Auto-reload and overflow mode */
DMTimerModeConfigure(SOC_DMTIMER_2_REGS, DMTIMER_AUTORLD_NOCMP_ENABLE);
DMTimerIntEnable(SOC_DMTIMER_2_REGS, DMTIMER_INT_OVF_EN_FLAG);
DMTimerEnable(SOC_DMTIMER_2_REGS);
And the ISR:
static void isr_func()
{
static int clockCtr=0;
static int ledCtr=0;
// DMTimerIntDisable(SOC_DMTIMER_2_REGS, DMTIMER_INT_OVF_EN_FLAG);
// DMTimerIntStatusClear(SOC_DMTIMER_2_REGS, DMTIMER_INT_OVF_IT_FLAG);
ledCtr++;
clockCtr++;
// some code here...
/* Re-enable the DMTimer interrupt */
// DMTimerIntEnable(SOC_DMTIMER_2_REGS, DMTIMER_INT_OVF_EN_FLAG);
}
On Sun, Nov 3, 2013 at 4:05 PM, Satz Klauer <[email protected]> wrote:
> The Starterware initialisation function already reads back the flag
> for CLK_M_OSC, so that should fit. Multiplexing is not necessary for
> DMTimer 2 and 3, so I don't know what to set/check here.
>
> What is TRM?
>
> On Sun, Nov 3, 2013 at 4:02 PM, Mark Lazarewicz <[email protected]> wrote:
>> Did you Read the TRM and manually check the relavent register values
>> including any mux register values
>>
>>
>>
>> On Sunday, November 3, 2013 5:46 AM, Satz Klauer <[email protected]>
>> wrote:
>>
>> Hi,
>>
>> I'm trying to set up a fast timer interrupt using CLK_M_OSC as clock source
>> for DMTimer2. For initialising this I'm calling DMTimer2ModuleClkConfig()
>> from Starterware code which itself seems to select CLK_M_OSC as source for
>> the timer clock using following code:
>>
>> /* Select the clock source for the Timer2 instance. */
>> HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER2_CLK) &=
>> ~(CM_DPLL_CLKSEL_TIMER2_CLK_CLKSEL);
>>
>> HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER2_CLK) |=
>> CM_DPLL_CLKSEL_TIMER2_CLK_CLKSEL_CLK_M_OSC;
>>
>> while((HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER2_CLK) &
>> CM_DPLL_CLKSEL_TIMER2_CLK_CLKSEL) !=
>> CM_DPLL_CLKSEL_TIMER2_CLK_CLKSEL_CLK_M_OSC);
>>
>> As fas as I understand there CLK_M_OSC is choosen.
>>
>> Nevertheless the frequency/calling speed of my ISR tells me I'm still at 32
>> kHz clock, so CLK_M_OSC does not seem to be used. My whole initialisation
>> code looks like this (and mainly comes from the Starterware examples):
>>
>> DMTimerModeConfigure(SOC_DMTIMER_2_REGS, DMTIMER_AUTORLD_NOCMP_ENABLE);
>> DMTimerCounterSet(SOC_DMTIMER_2_REGS, 0xFFFFFFF9u);
>> DMTimerReloadSet(SOC_DMTIMER_2_REGS, 0xFFFFFFF9u);
>>
>> DMTimer2ModuleClkConfig(); --> here CLK_M_OSC should be chosen...
>>
>> IntAINTCInit();
>>
>> IntRegister(SYS_INT_TINT2, isr_xy2_100);
>> IntPrioritySet(SYS_INT_TINT2, 0, AINTC_HOSTINT_ROUTE_IRQ);
>> IntSystemEnable(SYS_INT_TINT2);
>> IntMasterIRQEnable();
>>
>> So...what could be wrong? Why isn't the fast clock source used?
>>
>> Thanks!
>>
>> --
>> For more options, visit http://beagleboard.org/discuss
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