This is the follow-up of my previous CR (that is postponed for way too long...):
http://lists.helixcommunity.org/pipermail/common-dev/2006-June/003574.html

I have done what Greg suggested - compiling the distribution components and tested the functionality.


Modified by: [EMAIL PROTECTED]
Date: 07/25/2006
Project: Helix Player

Synopsis: Integrate fixes for g2mp4combo piacpu, sem_t, and math64.h into 150 Cay to fix GCC 4.x issues.

Overview:
Integrate Greg's fix g2mp4combo piacpu.c: fixed 'ebx' register clobbering while using the -fPIC compiler flag.

sem_t is now defined as an union, so HXsem_t can no longer subclass it.
Greg fixed this in HEAD already:
http://lists.helixcommunity.org/pipermail/common-dev/2006-June/003528.html

For more information about math64.h issue, see the following URL:
http://lists.helixcommunity.org/pipermail/audio-dev/2006-June/000717.html


Files Modified:
datatype-restricted/rm/video/codec/g2mp4combo/env/piacpu.cpp - Fix for 'ebx' register getting clobbered while using the -fPIC compiler flag.

common/system/pub/platform/unix/pthreadthreads.h - Define HXsem_t to be sem_t, rather than subclassing.
audio/fixptutil/pub/math64.h - Integrate Greg's fixes for GCC 4.x.x


Image Size and Heap Use impact (Client -Only):
None

Platforms and Profiles Affected:
g2mp4combo piacpu fix affects Linux, Unix, VXWORKS platforms.
sem_t fix affects all Unix platforms, math64.h fix affects all x86 platforms.

Distribution Libraries Affected:
g2mp4combo?

Distribution library impact and planned action:
<Is an update required and if so when will it occur ?>

Platforms and Profiles Build Verified:
Linux, hxclient_1_5_0_cayenne_restricted BIF, helix-client-all-defines profile.
Linux, hxplay_gtk_current BIF, helix-client-all-defines-free profile.

Platforms and Profiles Functionality verified:
Linux, hxclient_1_5_0_cayenne_restricted BIF, helix-client-all-defines, splay.

Branch: hxclient_1_5_0_cayenne

Copyright assignment: I am a RealNetworks employee.



Index: piacpu.cpp
===================================================================
RCS file: /cvsroot/rarvcode-mpeg4combo/codec/g2mp4combo/env/piacpu.cpp,v
retrieving revision 1.2.2.1
diff -u -w -r1.2.2.1 piacpu.cpp
--- piacpu.cpp  27 Apr 2005 19:31:57 -0000      1.2.2.1
+++ piacpu.cpp  26 Jul 2006 03:14:51 -0000
@@ -242,6 +242,7 @@
        I32 has_mmx = 0, has_kni = 0, has_sse2 = 0;

     __asm__ __volatile ("          \
+      push %%ebx                \n \
       pushfl                    \n \
       popl %%eax                \n \
       movl %%eax, %%ebx         \n \
@@ -282,10 +283,11 @@
       and $0x4000000, %%eax     \n \
       mov %%eax, %5             \n \
 jumphere:                       \n \
+      pop %%ebx                 \n \
 "
:"=m" (family),"=m" (model), "=m" (stepping), "=m" (has_mmx), "=m" (has_kni), "=m" (has_sse2)
 : /*no input*/
-: "eax","ebx","ecx","edx"
+: "eax","ecx","edx"
 );

     cpu_info.ia.family     = PIA_IA_CPU_Family(family);





Index: pthreadthreads.h
===================================================================
RCS file: /cvsroot/common/system/pub/platform/unix/pthreadthreads.h,v
retrieving revision 1.8
diff -u -w -r1.8 pthreadthreads.h
--- pthreadthreads.h    27 Oct 2004 23:41:10 -0000      1.8
+++ pthreadthreads.h    27 Jul 2006 02:23:37 -0000
@@ -102,10 +102,7 @@

 #ifndef _MAC_UNIX

-struct HXsem_t : public sem_t
-{
- char padding[64]; /* Flawfinder: ignore */ // different linux versions have different binary reps blechhhh!
-};
+typedef sem_t HXsem_t;

 //=======================================================================
 //




Index: math64.h
===================================================================
RCS file: /cvsroot/audio/fixptutil/pub/math64.h,v
retrieving revision 1.26.2.6
diff -u -w -r1.26.2.6 math64.h
--- math64.h    30 Apr 2006 18:50:29 -0000      1.26.2.6
+++ math64.h    27 Jul 2006 02:48:56 -0000
@@ -1,5 +1,5 @@
 /* ***** BEGIN LICENSE BLOCK *****
- * Source last modified: $Id: math64.h,v 1.26.2.6 2006/04/30 18:50:29 abockover Exp $ + * Source last modified: $Id: math64.h,v 1.31 2006/06/06 22:14:02 gwright Exp $
  *
  * Portions Copyright (c) 1995-2004 RealNetworks, Inc. All Rights Reserved.
  *
@@ -123,63 +123,37 @@
 // GCC / i386
 
///////////////////////////////////////////////////////////////////////////////////////

-#elif !defined(_MAC_UNIX) && defined(__GNUC__) && (defined(__i386__) || defined(__amd64__)) && !defined(_NO_GNU_AS) +#elif !defined(_MAC_UNIX) && defined(__GNUC__) && (defined(__i386__) || defined(__amd64__))

 #define HAVE_PLATFORM_MACROS

 /* Compute a * b / c, using 64-bit intermediate result */
static __inline__ int MulDiv64(register int x, register int y, register int z)
 {
- /* we specify four alternatives here, one for each permutation of memory or - register operand in the multiplier and the divisor. All are commutative in
-       the multiplication arguments, one of which needs to be in eax when we
-       start. */
-
-    __asm__ volatile ("imull %2\n\t"
-                      "idivl %3\n"
-                      : "+a,a,a,a" (x)
-                      : "%0,%0,%0,%0" (x), "m,r,m,r" (y), "m,m,r,r" (z)
-                      : "edx") ;
-    return x ;
+    return (int)(((INT64)x*(INT64)y)/(INT64)z);
 }

 /* Compute (a * b) >> 32, using 64-bit intermediate result */
 static __inline__ int MulShift32(int x, int y)
 {
-    int z ;
- /* we specify two alternatives here. The first one can read the multiplier from - memory, the second from from a register. Both return the result in eax,edx - and are commutative in the arguments, one of which needs to be in eax when we
-       start. */
- __asm__ volatile ("imull %3" : "=d,d" (z), "+a,a" (x): "%1,1" (x), "m,r" (y)) ;
-    return z ;
+    return (int)(((INT64)x*(INT64)y)>>32);
 }

 /* Compute (a * b) >> 31, using 64-bit intermediate result */
 static __inline__ int MulShift31(int x, int y)
 {
-    int zhi ;
-    __asm__ volatile ("imull %3\n\t"
- "shrdl $31,%1,%0": "+a,a" (x), "=d,d" (zhi) : "%0,%0" (x), "m,r" (y)) ;
-    return x ;
+    return (int)(((INT64)x*(INT64)y)>>31);
 }

-/* Compute (a * b) >> 30, using 64-bit intermediate result */
 static __inline__ int MulShift30(int x, int y)
 {
-    int zhi ;
-    __asm__ volatile ("imull %3\n\t"
- "shrdl $30,%1,%0" : "+a,a" (x), "=d,d" (zhi) : "%0,%0" (x), "m,r" (y)) ;
-    return x ;
+    return (int)(((INT64)x*(INT64)y)>>30);
 }

 /* Compute (a * b) >> n, using 64-bit intermediate result */
static __inline__ int MulShiftN(register int x, register int y, register int n)
 {
-    int zhi ;
-    __asm__ volatile ("imull %3\n\t"
- "shrdl %%cl,%1,%0" : "+a,a" (x), "=d,d" (zhi) : "%0,%0" (x), "m,r" (y), "c,c" (n)) ;
-    return x ;
+    return (int)(((INT64)x*(INT64)y)>>n);
 }

 #ifdef TIMING
@@ -196,6 +170,9 @@
 #endif

 #ifdef DEBUG
+#  ifdef ASSERT
+#    undef ASSERT
+#  endif
 #define ASSERT(x) if (!(x)) __asm__ __volatile ("int $3" :: )
 #endif




--
Daniel Yek


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