On Tue, 2004-10-12 at 17:44 +0200, Peter Svensson wrote: > On Tue, 12 Oct 2004, Steven Critchfield wrote: > > > Funny since there is only 4 real IRQ lines on a PCI bus. They are A, B, > > C, and D. If you have more than 4 slots on a PCI bus, then you are most > > definately reusing a real IRQ wire. > > > > As for if PPC could handle it, I haven't seen any drivers. Could be me > > ignoring those threads. > > This is not correct. Each pci slot has four physical interrupt lines, A-D. > The implementation is free to supply four separate interrupt lines to each > card, i.e. the interupt lines are different for each slot on the bus.
Unless some PCI chipset is now dolling out 4 IRQ lines per slot, they have to merge somewhere and at that merge, they become shared. http://old.lwn.net/1998/0205/io-apic.html > On the other hand, most of the comments about the problems with interrupt > sharing on the pci bus are not very informed either. The interrupt handles > are normally very fast and the pci specification definitly allows for > shared interrupts. I suspect either a hardware problem or that the dirvers > are somehow incorrect. > > Does anyone have any hard numbers on the interrupt latencies tolerated by > the digium cards? I would assume 100-200us to be acceptable. The facts about Zapata hardware is that there is no buffering. If you miss an interupt, you miss data. Interupts are fired 1000 times a second or as soon as 8 bits are collected on the 8000hz phone lines. -- Steven Critchfield <[EMAIL PROTECTED]> _______________________________________________ Asterisk-Users mailing list [EMAIL PROTECTED] http://lists.digium.com/mailman/listinfo/asterisk-users To UNSUBSCRIBE or update options visit: http://lists.digium.com/mailman/listinfo/asterisk-users
