> > > I don't know if this has any relevance but I am also originating the
> clock source from the * side with Wildcard T1 card.
> >
> > That's really the only way it'll work.  The channel bank can't generate
> > clocking.

be carefull with semantics

the transmit leg of the T1 leaving the channel bank is clocked by the 
channel bank, and therefore could be used by the device at the opposite
end for "sync". However, the clock within an end-node channel bank is 
(by design) syncing off the receive leg of the T1. Therefore, by design 
it is not an official "source" of clock sync. Words #?!%*

> Is that a general statement of just confined to the ADIT 600
> I thought any T1 interface could either receive timing or it can be a source
> for timing its just the interface may not be a high quality source 
> eg stratum 4 not stratum1

exactly.



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