I'm not -quite- sure what this is trying
to say on page 7-321 when describing
the LOAD LOGICAL INDEXED ADDRESS instructions:
"Any carry out of the 32-bit
addition is discarded. The 64-bit intermediate
result will have bits 0 to 31 of the results are
forced to zeros prepended to the result of the 32-
bit intermediate addition."
I can make a guess that it is saying that the
value in the X2 register is treated as an unsigned
32-bit value, which is then added to the signed
D2 value to produce a 32-bit (signed?) intermediate
value. The 32-bit signed intermediate value is
made 64-bits by ignoring bits 0-31 in the result.
(That's the "any carry out" part.) That 64-bit
intermediate result is then truncated
to a 32-bit unsigned result by forcing bits 0-31
to zeros.
Does that sound right?
- Dave Rivers -
--
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