The problem isn't in the assembler, but in the IBM mapping macros that have EQU to absolute addresses. FLAG(, PAGE0) is doing what it is supposed to do.
For new code, there's no issue: use, e.g., CVTPTR(,0), FLCCVT. -- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 עַם יִשְׂרָאֵל חַי נֵ֣צַח יִשְׂרָאֵ֔ל לֹ֥א יְשַׁקֵּ֖ר ________________________________________ From: IBM Mainframe Assembler List <[email protected]> on behalf of Jonathan Scott <[email protected]> Sent: Thursday, July 11, 2024 9:46 AM To: [email protected] Subject: Re: Getting to CVT with FLAG(PAGE0) The purpose of the FLAG(PAGE0) option, added for HLASM 1.3 in 1998, is to warn users that they have coded an absolute expression for an address expression without any base or index register, so they will be implicitly referencing low storage, which might be accidental. If you do not want this warning, you can either add an explicit zero base register, making it clear that it is intentional, or you can turn off the warning (temporarily if necessary). The option originally only checked for a base register (either specified explicitly or via a USING with 0) but the processing was subsequently modified so that specifying a zero index register is also accepted as an indication that the reference is intentional. There is nothing requiring a "fix" in that respect. This warning has proved very useful in detecting accidents, for example when MVC is coded instead of MVI. That is why IBM macros have been modified to specify a zero base register, allowing users to turn on this option to check their own code without triggering extra warnings from IBM macro expansions. Shmuel (Seymour J.) Metz writes: > FSVO "told what to do"; an explanation of how to change each of the many > places that got the warning is a messy circumvention, not a fix. Jonathan Scott, HLASM IBM Hursley, UK
