I think the consensus just recently (in a discussion of where the
arguments (resolved at build time rather than execution time) of an
expanded macro should be placed) was that EX(RL) accesses the
instruction in the I-cache.
On 2021-11-23 8:55 p.m., Charles Mills wrote:
Is the EX target accessed from the I-cache or the D-cache?
I have forgotten but I know I have seen it documented.
Charles
Gary Weinhold
Senior Application Architect
DATAKINETICS | Data Performance & Optimization
Phone:+1.613.523.5500 x216
Email: [email protected]
Visit us online at www.DKL.com
E-mail Notification: The information contained in this email and any
attachments is confidential and may be subject to copyright or other
intellectual property protection. If you are not the intended recipient, you
are not authorized to use or disclose this information, and we request that you
notify us by reply mail or telephone and delete the original message from your
mail system.
-----Original Message-----
From: IBM Mainframe Assembler List [mailto:[email protected]] On
Behalf Of Paul Gilmartin
Sent: Tuesday, November 23, 2021 3:57 PM
To:[email protected]
Subject: Re: ASMA030E?
On Nov 23, 2021, at 15:23:49, Charles Mills<[email protected]> wrote:
...
LA somereg,=C'blah')
And an EX rather than an L. Would that work for you? Does require a base
register. LARL would not, but it's 6 bytes rather than 4.
Does an EX of an LARL displace relative to the location of the EX or thee
LARL? HLASM can only assume the latter and hope the hardware concurs.
(Is the EX target accessed from the I-cache or the D-cache?)
A harder question might be whether a literal S-constant assumes the USING
in effect at the point of generating the literal or at the LTORG.
Is this documented or does POLA suffice?
(Thinking back a few weeks to a recherché use of a triple S-literal to
generate an SS instruction in the literal pool.)
-- gil
