It is true that the Chapter 1 blurb describing the high-word facility states that it "effectively provides sixteen additional 32-bit registers ..." But, if you think about the nuances of addressing modes carefully, you'll quickly realize that the facility cannot be used for address generation ... thus HLASM USING support is irrelevant.
If the hardware was actually capable of using a high-word as a base or index register, it might work fine for the 24- or 31-bit addressing modes. However, things would rapidly go sideways if the program switched to the 64-bit addressing mode. For a better understanding of the how and why of address generation, check out the section "Address Generation" beginning on p. 5-10 of the current PoO (SA22-7832-12).
