Hello Philippe A comment about replacing LTR/BZ combinations with CIJE - the compare immediate instructions do NOT set the condition code so you need to make sure that the BZ is the only instruction testing the condition code.
Also earlier, you made a comment about Execute that you need to review these as well - my understanding is that Execute only modifies the instruction instream and as such does not attempt to update the instruction cache and the subsequent delays that causes. Of course the instruction that is being Executed may be a cause of the problem in itself. If you do have non-rent programs with embedded save areas, then you should see a benefit from making sure that the save area is in a different cache line - the judicious use of ORG to place code and data onto specific boundaries may help here. For example, ORG ,256 will move the location counter to the next 256 byte boundary - you will need to use the assembler options GOFF and SECTALGN for this to work, as well as binding the module so that it is loaded onto the correct boundary Kind Regards John Internet: [email protected] Phone: +61 8 926 18473 (xtn 18473; Tie-Line: 701 8473) From: Philippe Cloarec <[email protected]> To: [email protected] Date: 12/11/2016 21:16 Subject: Re: SIIS "issue" after upgrade to z13 machine. Sent by: IBM Mainframe Assembler List <[email protected]> Hi Martin and Rob, First thx much for your input. Here are 3 links which relate the "issue" and common code for which we fall into a SIIS scenario: https://www.google.fr/#q=istream_flash_062606_v4 http://s3-us-west-1.amazonaws.com/watsonwalker/ww/wp-content/uploads/2016/03/06173415/18017-The-Cheryl-and-Frank-zRoadshow.pdf http://conferences.gse.org.uk/attachments/presentations/ibHo4j_1446285934.pdf Unfortunately I have more than 1000 pgms to review and handle on a short timeframe, so I will have no time to implement "Baseless processing". I do plan to SAK(Search And Kill) SIIS occurences for scenarios described in above links I will find and implement newer instructions as immediate ones to eliminate memory references and constants in storage as well. I will check cases where two instructions can be replaced by one only...to use CIJE in place of LTR/BZ combination as for example. Since we do talk of CPU cycles savings here I will check for AGI cases and their resolution and try to implement instruction grouping as much I can. >From my humble point this is a real topic and all z13 sites having old productions Batch programs should perform some action. regards Philippe
