Add support to fetch PM log sample from SMU v13.0.6
Signed-off-by: Lijo Lazar <[email protected]>
---
v2: Check if input buffer has enough space to copy log data
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 1 +
.../pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h | 4 +-
drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 4 +-
.../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 59 +++++++++++++++++++
4 files changed, 66 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 0d84fb9640a6..01bc92875f3e 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -253,6 +253,7 @@ struct smu_table {
uint64_t mc_address;
void *cpu_addr;
struct amdgpu_bo *bo;
+ uint32_t version;
};
enum smu_perf_level_designation {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h
index 509e3cd483fb..891d03327ffa 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h
@@ -91,7 +91,9 @@
#define PPSMC_MSG_QueryValidMcaCeCount 0x3A
#define PPSMC_MSG_McaBankCeDumpDW 0x3B
#define PPSMC_MSG_SelectPLPDMode 0x40
-#define PPSMC_Message_Count 0x41
+#define PPSMC_MSG_PmLogReadSample 0x41
+#define PPSMC_MSG_PmLogGetTableVersion 0x42
+#define PPSMC_Message_Count 0x43
//PPSMC Reset Types for driver msg argument
#define PPSMC_RESET_TYPE_DRIVER_MODE_1_RESET 0x1
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
index 4850e48bbef5..6ea9adabe30f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
@@ -253,7 +253,9 @@
__SMU_DUMMY_MAP(QueryValidMcaCeCount), \
__SMU_DUMMY_MAP(McaBankDumpDW), \
__SMU_DUMMY_MAP(McaBankCeDumpDW), \
- __SMU_DUMMY_MAP(SelectPLPDMode),
+ __SMU_DUMMY_MAP(SelectPLPDMode), \
+ __SMU_DUMMY_MAP(PmLogGetTableVersion), \
+ __SMU_DUMMY_MAP(PmLogReadSample),
#undef __SMU_DUMMY_MAP
#define __SMU_DUMMY_MAP(type) SMU_MSG_##type
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
index bf01a23f399a..e5f84d8dec80 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
@@ -172,6 +172,8 @@ static const struct cmn2asic_msg_mapping
smu_v13_0_6_message_map[SMU_MSG_MAX_COU
MSG_MAP(McaBankDumpDW, PPSMC_MSG_McaBankDumpDW,
0),
MSG_MAP(McaBankCeDumpDW, PPSMC_MSG_McaBankCeDumpDW,
0),
MSG_MAP(SelectPLPDMode, PPSMC_MSG_SelectPLPDMode,
0),
+ MSG_MAP(PmLogGetTableVersion,
PPSMC_MSG_PmLogGetTableVersion, 0),
+ MSG_MAP(PmLogReadSample, PPSMC_MSG_PmLogReadSample,
0),
};
static const struct cmn2asic_mapping smu_v13_0_6_clk_map[SMU_CLK_COUNT] = {
@@ -337,6 +339,61 @@ static int smu_v13_0_6_get_allowed_feature_mask(struct
smu_context *smu,
return 0;
}
+static int smu_v13_0_6_setup_pm_log(struct smu_context *smu)
+{
+ struct smu_table_context *smu_tbl_ctxt = &smu->smu_table;
+ struct smu_table *table = &smu_tbl_ctxt->tables[SMU_TABLE_PMSTATUSLOG];
+ uint32_t pmlog_version;
+ int ret;
+
+ if (!table->size)
+ return 0;
+
+ ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PmLogGetTableVersion,
+ &pmlog_version);
+ if (ret)
+ return ret;
+
+ table->version = pmlog_version;
+
+ return 0;
+}
+
+static ssize_t smu_v13_0_6_get_pm_log(struct smu_context *smu, void *log,
+ size_t max_size)
+{
+ struct smu_table_context *smu_tbl_ctxt = &smu->smu_table;
+ struct smu_table *table = &smu_tbl_ctxt->tables[SMU_TABLE_PMSTATUSLOG];
+ struct amdgpu_pmlog *pm_log = log;
+ uint32_t pmfw_version, log_size;
+ int ret;
+
+ if (smu->adev->flags & AMD_IS_APU)
+ return -EOPNOTSUPP;
+
+ if (!pm_log || !max_size)
+ return -EINVAL;
+
+ smu_cmn_get_smc_version(smu, NULL, &pmfw_version);
+ ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PmLogReadSample, &log_size);
+ if (ret)
+ return ret;
+
+ if (max_size < (log_size + sizeof(pm_log->common_header)))
+ return -EOVERFLOW;
+
+ amdgpu_asic_invalidate_hdp(smu->adev, NULL);
+ memcpy(pm_log->data, table->cpu_addr, log_size);
+
+ memset(&pm_log->common_header, 0, sizeof(pm_log->common_header));
+ pm_log->common_header.mp1_ip_discovery_version = IP_VERSION(13, 0, 6);
+ pm_log->common_header.pmfw_version = pmfw_version;
+ pm_log->common_header.pmlog_version = table->version;
+ pm_log->common_header.structure_size =
+ sizeof(pm_log->common_header) + log_size;
+
+ return pm_log->common_header.structure_size;
+}
static int smu_v13_0_6_get_metrics_table(struct smu_context *smu,
void *metrics_table, bool bypass_cache)
{
@@ -549,6 +606,7 @@ static int smu_v13_0_6_set_default_dpm_table(struct
smu_context *smu)
};
smu_v13_0_6_setup_driver_pptable(smu);
+ smu_v13_0_6_setup_pm_log(smu);
/* gfxclk dpm table setup */
dpm_table = &dpm_context->dpm_tables.gfx_table;
@@ -2799,6 +2857,7 @@ static const struct pptable_funcs smu_v13_0_6_ppt_funcs =
{
.log_thermal_throttling_event =
smu_v13_0_6_log_thermal_throttling_event,
.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
.get_gpu_metrics = smu_v13_0_6_get_gpu_metrics,
+ .get_pm_log = smu_v13_0_6_get_pm_log,
.get_thermal_temperature_range =
smu_v13_0_6_get_thermal_temperature_range,
.mode1_reset_is_support = smu_v13_0_6_is_mode1_reset_supported,
.mode2_reset_is_support = smu_v13_0_6_is_mode2_reset_supported,
--
2.25.1
