Using cpu to update page tables is sychronous, no need to wait fence and it is NULL in such a case.
Signed-off-by: Lang Yu <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c index f0f00466b59f..197981c4ac7d 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c @@ -1043,8 +1043,11 @@ int amdgpu_mes_add_ring(struct amdgpu_device *adev, int gang_id, amdgpu_mes_ring_to_queue_props(adev, ring, &qprops); - dma_fence_wait(gang->process->vm->last_update, false); - dma_fence_wait(ctx_data->meta_data_va->last_pt_update, false); + if (gang->process->vm->last_update) + dma_fence_wait(gang->process->vm->last_update, false); + if (ctx_data->meta_data_va->last_pt_update) + dma_fence_wait(ctx_data->meta_data_va->last_pt_update, false); + amdgpu_mes_unlock(&adev->mes); r = amdgpu_mes_add_hw_queue(adev, gang_id, &qprops, &queue_id); -- 2.25.1
