From: Alvin Lee <[email protected]>

- We want to disable SubVP if Graphics Error Correction/Correcting Code
  (GECC) is enabled.
- After reading feature caps from DMCUB during init, use the GECC
  enable/disable info to determine if SubVP can be enabled or not.

Reviewed-by: Nicholas Kazlauskas <[email protected]>
Reviewed-by: Jun Lei <[email protected]>
Acked-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Alvin Lee <[email protected]>
---
 drivers/gpu/drm/amd/display/dc/dc.h                  | 1 +
 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c   | 1 +
 drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 2 +-
 3 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h 
b/drivers/gpu/drm/amd/display/dc/dc.h
index 5268d98b96dc..17afe7915f48 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -210,6 +210,7 @@ struct dc_dmub_caps {
        bool psr;
        bool mclk_sw;
        bool subvp_psr;
+       bool gecc_enable;
 };
 
 struct dc_caps {
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
index 1e9ada8b131c..4950eaa4406b 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
@@ -945,6 +945,7 @@ void dcn32_init_hw(struct dc *dc)
                dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv);
                dc->caps.dmub_caps.psr = 
dc->ctx->dmub_srv->dmub->feature_caps.psr;
                dc->caps.dmub_caps.subvp_psr = 
dc->ctx->dmub_srv->dmub->feature_caps.subvp_psr_support;
+               dc->caps.dmub_caps.gecc_enable = 
dc->ctx->dmub_srv->dmub->feature_caps.gecc_enable;
                dc->caps.dmub_caps.mclk_sw = 
dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch;
        }
 }
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c 
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
index 2624236d20d0..34ac5a1eb3ca 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
@@ -1130,7 +1130,7 @@ static void dcn32_full_validate_bw_helper(struct dc *dc,
         * 4. Display configuration passes validation
         * 5. (Config doesn't support MCLK in VACTIVE/VBLANK || 
dc->debug.force_subvp_mclk_switch)
         */
-       if (!dc->debug.force_disable_subvp && 
dcn32_all_pipes_have_stream_and_plane(dc, context) &&
+       if (!dc->debug.force_disable_subvp && !dc->caps.dmub_caps.gecc_enable 
&& dcn32_all_pipes_have_stream_and_plane(dc, context) &&
            !dcn32_mpo_in_use(context) && !dcn32_any_surfaces_rotated(dc, 
context) &&
                (*vlevel == context->bw_ctx.dml.soc.num_states ||
            vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] == 
dm_dram_clock_change_unsupported ||
-- 
2.39.2

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