It was reported that on kernel v6.2-rc1, we have the following stack size issue:
[...]/display/dc/dml/dcn314/display_mode_vba_314.c: In function 'UseMinimumDCFCLK': [...]/display/dc/dml/dcn314/display_mode_vba_314.c:7127:1: error: the frame size of 2208 bytes is larger than 2048 bytes [-Werror=frame-larger-than=] Remove TotalMaxPrefetchFlipDPTERowBandwidth from UseMinimumDCFCLK (DCN314), and use TotalMaxPrefetchFlipDPTERowBandwidth from struct. Cc: Alex Deucher <[email protected]> Cc: Aurabindo Pillai <[email protected]> Cc: Hamza Mahfooz <[email protected]> Cc: Roman Li <[email protected]> Cc: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/all/[email protected]/ Reported-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> --- .../drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c index 950669f2c10d..2ea89a26c6e8 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c @@ -6972,7 +6972,6 @@ static void UseMinimumDCFCLK( struct vba_vars_st *v = &mode_lib->vba; int dummy1, i, j, k; double NormalEfficiency, dummy2, dummy3; - double TotalMaxPrefetchFlipDPTERowBandwidth[DC__VOLTAGE_STATES][2]; NormalEfficiency = v->PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency / 100.0; for (i = 0; i < v->soc.num_states; ++i) { @@ -6991,9 +6990,9 @@ static void UseMinimumDCFCLK( int NoOfDPPState[DC__NUM_DPP__MAX]; double MinimumTvmPlus2Tr0; - TotalMaxPrefetchFlipDPTERowBandwidth[i][j] = 0; + v->UseMinimumDCFCLK_stack_reduction.TotalMaxPrefetchFlipDPTERowBandwidth[i][j] = 0; for (k = 0; k < v->NumberOfActivePlanes; ++k) { - TotalMaxPrefetchFlipDPTERowBandwidth[i][j] = TotalMaxPrefetchFlipDPTERowBandwidth[i][j] + v->UseMinimumDCFCLK_stack_reduction.TotalMaxPrefetchFlipDPTERowBandwidth[i][j] = v->UseMinimumDCFCLK_stack_reduction.TotalMaxPrefetchFlipDPTERowBandwidth[i][j] + v->NoOfDPP[i][j][k] * v->DPTEBytesPerRow[i][j][k] / (15.75 * v->HTotal[k] / v->PixelClock[k]); } @@ -7003,7 +7002,7 @@ static void UseMinimumDCFCLK( MinimumTWait = CalculateTWait(MaxPrefetchMode, v->FinalDRAMClockChangeLatency, v->UrgLatency[i], v->SREnterPlusExitTime); NonDPTEBandwidth = v->TotalVActivePixelBandwidth[i][j] + v->TotalVActiveCursorBandwidth[i][j] + v->TotalMetaRowBandwidth[i][j]; DPTEBandwidth = (v->HostVMEnable == true || v->ImmediateFlipRequirement[0] == dm_immediate_flip_required) ? - TotalMaxPrefetchFlipDPTERowBandwidth[i][j] : v->TotalDPTERowBandwidth[i][j]; + v->UseMinimumDCFCLK_stack_reduction.TotalMaxPrefetchFlipDPTERowBandwidth[i][j] : v->TotalDPTERowBandwidth[i][j]; DCFCLKRequiredForAverageBandwidth = dml_max3( v->ProjectedDCFCLKDeepSleep[i][j], (NonDPTEBandwidth + v->TotalDPTERowBandwidth[i][j]) / v->ReturnBusWidth -- 2.39.0
