Thank you for the quick revision! Series is Reviewed-by: André Almeida <[email protected]>
Às 15:36 de 21/07/22, Maíra Canal escreveu: > As the enum entries dm_sw_gfx7_2d_thin_gl and dm_sw_gfx7_2d_thin_l_vp > are not used on the codebase, drop those entries from enum > dm_swizzle_mode. > > Signed-off-by: Maíra Canal <[email protected]> > --- > v1 -> v2: > - Replace "enum" to "enum entries" (André Almeida). > - Describe changes in imperative mood (André Almeida). > --- > .../dc/dml/dcn20/display_mode_vba_20.c | 26 +++++------------- > .../dc/dml/dcn20/display_mode_vba_20v2.c | 26 +++++------------- > .../dc/dml/dcn21/display_mode_vba_21.c | 27 +++++-------------- > .../amd/display/dc/dml/display_mode_enums.h | 2 -- > .../display/dc/dml/dml_wrapper_translation.c | 9 ------- > 5 files changed, 19 insertions(+), 71 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c > b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c > index d3b5b6fedf04..4e4cb0927057 100644 > --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c > +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c > @@ -938,7 +938,7 @@ static unsigned int CalculateVMAndRowBytes( > *MetaRowByte = 0; > } > > - if (SurfaceTiling == dm_sw_linear || SurfaceTiling == > dm_sw_gfx7_2d_thin_gl || SurfaceTiling == dm_sw_gfx7_2d_thin_l_vp) { > + if (SurfaceTiling == dm_sw_linear) { > MacroTileSizeBytes = 256; > MacroTileHeight = BlockHeight256Bytes; > } else if (SurfaceTiling == dm_sw_4kb_s || SurfaceTiling == > dm_sw_4kb_s_x > @@ -3347,26 +3347,12 @@ void > dml20_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l > > == dm_420_8 > || > mode_lib->vba.SourcePixelFormat[k] > > == dm_420_10)) > - || (((mode_lib->vba.SurfaceTiling[k] == > dm_sw_gfx7_2d_thin_gl > - || > mode_lib->vba.SurfaceTiling[k] > - == > dm_sw_gfx7_2d_thin_l_vp) > - && > !((mode_lib->vba.SourcePixelFormat[k] > - == dm_444_64 > + || (mode_lib->vba.DCCEnable[k] == true > + && > (mode_lib->vba.SurfaceTiling[k] == dm_sw_linear > || > mode_lib->vba.SourcePixelFormat[k] > - > == dm_444_32) > - && > mode_lib->vba.SourceScan[k] > - > == dm_horz > - && > mode_lib->vba.SupportGFX7CompatibleTilingIn32bppAnd64bpp > - > == true > - && > mode_lib->vba.DCCEnable[k] > - > == false)) > - || (mode_lib->vba.DCCEnable[k] > == true > - && > (mode_lib->vba.SurfaceTiling[k] > - > == dm_sw_linear > - > || mode_lib->vba.SourcePixelFormat[k] > - > == dm_420_8 > - > || mode_lib->vba.SourcePixelFormat[k] > - > == dm_420_10)))) { > + > == dm_420_8 > + || > mode_lib->vba.SourcePixelFormat[k] > + > == dm_420_10))) { > mode_lib->vba.SourceFormatPixelAndScanSupport = false; > } > } > diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c > b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c > index 63bbdf8b8678..eaa0cdb599ba 100644 > --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c > +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c > @@ -998,7 +998,7 @@ static unsigned int CalculateVMAndRowBytes( > *MetaRowByte = 0; > } > > - if (SurfaceTiling == dm_sw_linear || SurfaceTiling == > dm_sw_gfx7_2d_thin_gl || SurfaceTiling == dm_sw_gfx7_2d_thin_l_vp) { > + if (SurfaceTiling == dm_sw_linear) { > MacroTileSizeBytes = 256; > MacroTileHeight = BlockHeight256Bytes; > } else if (SurfaceTiling == dm_sw_4kb_s || SurfaceTiling == > dm_sw_4kb_s_x > @@ -3454,26 +3454,12 @@ void > dml20v2_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode > > == dm_420_8 > || > mode_lib->vba.SourcePixelFormat[k] > > == dm_420_10)) > - || (((mode_lib->vba.SurfaceTiling[k] == > dm_sw_gfx7_2d_thin_gl > - || > mode_lib->vba.SurfaceTiling[k] > - == > dm_sw_gfx7_2d_thin_l_vp) > - && > !((mode_lib->vba.SourcePixelFormat[k] > - == dm_444_64 > + || (mode_lib->vba.DCCEnable[k] == true > + && > (mode_lib->vba.SurfaceTiling[k] == dm_sw_linear > || > mode_lib->vba.SourcePixelFormat[k] > - > == dm_444_32) > - && > mode_lib->vba.SourceScan[k] > - > == dm_horz > - && > mode_lib->vba.SupportGFX7CompatibleTilingIn32bppAnd64bpp > - > == true > - && > mode_lib->vba.DCCEnable[k] > - > == false)) > - || (mode_lib->vba.DCCEnable[k] > == true > - && > (mode_lib->vba.SurfaceTiling[k] > - > == dm_sw_linear > - > || mode_lib->vba.SourcePixelFormat[k] > - > == dm_420_8 > - > || mode_lib->vba.SourcePixelFormat[k] > - > == dm_420_10)))) { > + > == dm_420_8 > + || > mode_lib->vba.SourcePixelFormat[k] > + > == dm_420_10))) { > mode_lib->vba.SourceFormatPixelAndScanSupport = false; > } > } > diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c > b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c > index 8a7485e21d53..198d81861ac5 100644 > --- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c > +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c > @@ -1342,7 +1342,7 @@ static unsigned int CalculateVMAndRowBytes( > *MetaRowByte = 0; > } > > - if (SurfaceTiling == dm_sw_linear || SurfaceTiling == > dm_sw_gfx7_2d_thin_gl || SurfaceTiling == dm_sw_gfx7_2d_thin_l_vp) { > + if (SurfaceTiling == dm_sw_linear) { > MacroTileSizeBytes = 256; > MacroTileHeight = BlockHeight256Bytes; > } else if (SurfaceTiling == dm_sw_4kb_s || SurfaceTiling == > dm_sw_4kb_s_x > @@ -3579,26 +3579,13 @@ void > dml21_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l > > == dm_420_8 > || > mode_lib->vba.SourcePixelFormat[k] > > == dm_420_10)) > - || (((mode_lib->vba.SurfaceTiling[k] == > dm_sw_gfx7_2d_thin_gl > - || > mode_lib->vba.SurfaceTiling[k] > - == > dm_sw_gfx7_2d_thin_l_vp) > - && > !((mode_lib->vba.SourcePixelFormat[k] > - == dm_444_64 > + || (mode_lib->vba.DCCEnable[k] == true > + && > (mode_lib->vba.SurfaceTiling[k] > + == dm_sw_linear > || > mode_lib->vba.SourcePixelFormat[k] > - > == dm_444_32) > - && > mode_lib->vba.SourceScan[k] > - > == dm_horz > - && > mode_lib->vba.SupportGFX7CompatibleTilingIn32bppAnd64bpp > - > == true > - && > mode_lib->vba.DCCEnable[k] > - > == false)) > - || (mode_lib->vba.DCCEnable[k] > == true > - && > (mode_lib->vba.SurfaceTiling[k] > - > == dm_sw_linear > - > || mode_lib->vba.SourcePixelFormat[k] > - > == dm_420_8 > - > || mode_lib->vba.SourcePixelFormat[k] > - > == dm_420_10)))) { > + > == dm_420_8 > + || > mode_lib->vba.SourcePixelFormat[k] > + > == dm_420_10))) { > mode_lib->vba.SourceFormatPixelAndScanSupport = false; > } > } > diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h > b/drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h > index f394b3f3922a..0e06727d40b3 100644 > --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h > +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h > @@ -89,8 +89,6 @@ enum dm_swizzle_mode { > dm_sw_var_s_x = 29, > dm_sw_var_d_x = 30, > dm_sw_var_r_x = 31, > - dm_sw_gfx7_2d_thin_l_vp, > - dm_sw_gfx7_2d_thin_gl, > }; > enum lb_depth { > dm_lb_10 = 0, dm_lb_8 = 1, dm_lb_6 = 2, dm_lb_12 = 3, dm_lb_16 = 4, > diff --git a/drivers/gpu/drm/amd/display/dc/dml/dml_wrapper_translation.c > b/drivers/gpu/drm/amd/display/dc/dml/dml_wrapper_translation.c > index 4ec5310a2962..9edcb6fc83c1 100644 > --- a/drivers/gpu/drm/amd/display/dc/dml/dml_wrapper_translation.c > +++ b/drivers/gpu/drm/amd/display/dc/dml/dml_wrapper_translation.c > @@ -35,15 +35,6 @@ static void gfx10array_mode_to_dml_params( > case DC_ARRAY_LINEAR_GENERAL: > *sw_mode = dm_sw_linear; > break; > - case DC_ARRAY_2D_TILED_THIN1: > -// DC_LEGACY_TILING_ADDR_GEN_ZERO - undefined as per current code hence > removed > -#if 0 > - if (compat_level == DC_LEGACY_TILING_ADDR_GEN_ZERO) > - *sw_mode = dm_sw_gfx7_2d_thin_l_vp; > - else > - *sw_mode = dm_sw_gfx7_2d_thin_gl; > -#endif > - break; > default: > ASSERT(0); /* Not supported */ > break;
