From: Evan Quan <[email protected]> Enable Fine Grained Clock Gating on soc21 asics.
Signed-off-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/amd/amdgpu/soc21.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c index dc200d11fcca..d738635ecf1d 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc21.c +++ b/drivers/gpu/drm/amd/amdgpu/soc21.c @@ -481,7 +481,8 @@ static int soc21_common_early_init(void *handle) switch (adev->ip_versions[GC_HWIP][0]) { case IP_VERSION(11, 0, 0): adev->cg_flags = AMD_CG_SUPPORT_GFX_CGCG | - AMD_CG_SUPPORT_GFX_CGLS; + AMD_CG_SUPPORT_GFX_CGLS | + AMD_CG_SUPPORT_REPEATER_FGCG; adev->pg_flags = AMD_PG_SUPPORT_ATHUB | AMD_PG_SUPPORT_MMHUB; adev->external_rev_id = adev->rev_id + 0x1; // TODO: need update -- 2.35.1
