On 01/24/ , Lazar, Lijo wrote:
>
>
> On 1/24/2022 2:42 PM, Lang Yu wrote:
> > Some clients(e.g., kfd) query sclk/mclk through this function.
> > Because cyan skillfish don't support dpm. For sclk, set min/max
> > to CYAN_SKILLFISH_SCLK_MIN/CYAN_SKILLFISH_SCLK_MAX(to maintain the
> > existing logic).For others, set both min and max to current value.
> >
> > Before this patch:
> > # /opt/rocm/opencl/bin/clinfo
> >
> > Max clock frequency: 0Mhz
> >
> > After this patch:
> > # /opt/rocm/opencl/bin/clinfo
> >
> > Max clock frequency: 2000Mhz
> >
> > v2:
> > - Maintain the existing min/max sclk logic.(Lijo)
> >
> > Signed-off-by: Lang Yu <[email protected]>
> > ---
> > .../amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 35 +++++++++++++++++++
> > 1 file changed, 35 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
> > b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
> > index 2238ee19c222..1b58fea47181 100644
> > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
> > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
> > @@ -552,6 +552,40 @@ static int cyan_skillfish_od_edit_dpm_table(struct
> > smu_context *smu,
> > return ret;
> > }
> > +static int cyan_skillfish_get_dpm_ultimate_freq(struct smu_context *smu,
> > + enum smu_clk_type clk_type,
> > + uint32_t *min,
> > + uint32_t *max)
> > +{
> > + int ret = 0;
> > +
> > + if (min) {
> > + switch (clk_type) {
> > + case SMU_GFXCLK:
> > + case SMU_SCLK:
> > + *min = CYAN_SKILLFISH_SCLK_MIN;
> > + break;
> > + default:
> > + ret = cyan_skillfish_get_current_clk_freq(smu,
> > clk_type, min);
> > + break;
> > + }
> > + }
> > +
> > + if (max) {
> > + switch (clk_type) {
> > + case SMU_GFXCLK:
> > + case SMU_SCLK:
> > + *max = CYAN_SKILLFISH_SCLK_MAX;
> > + break;
> > + default:
> > + ret = cyan_skillfish_get_current_clk_freq(smu,
> > clk_type, max);
> > + break;
>
> It's better to use temporary variables rather than fetching metrics table
> twice when min/max are both non-null.
Thanks for your advice. Do you think if the following is fine? Thanks!
static int cyan_skillfish_get_dpm_ultimate_freq(struct smu_context *smu,
enum smu_clk_type clk_type,
uint32_t *min,
uint32_t *max)
{
int ret = 0;
if (min) {
switch (clk_type) {
case SMU_GFXCLK:
case SMU_SCLK:
*min = CYAN_SKILLFISH_SCLK_MIN;
break;
default:
ret = cyan_skillfish_get_current_clk_freq(smu,
clk_type, min);
if (ret)
return ret;
break;
}
}
if (max) {
switch (clk_type) {
case SMU_GFXCLK:
case SMU_SCLK:
*max = CYAN_SKILLFISH_SCLK_MAX;
break;
default:
if (min)
*max = *min;
else
ret = cyan_skillfish_get_current_clk_freq(smu,
clk_type, max);
break;
}
}
return ret;
}
Regards,
Lang
> Thanks,
> Lijo
>
> > + }
> > + }
> > +
> > + return ret;
> > +}
> > +
> > static const struct pptable_funcs cyan_skillfish_ppt_funcs = {
> > .check_fw_status = smu_v11_0_check_fw_status,
> > @@ -565,6 +599,7 @@ static const struct pptable_funcs
> > cyan_skillfish_ppt_funcs = {
> > .is_dpm_running = cyan_skillfish_is_dpm_running,
> > .get_gpu_metrics = cyan_skillfish_get_gpu_metrics,
> > .od_edit_dpm_table = cyan_skillfish_od_edit_dpm_table,
> > + .get_dpm_ultimate_freq = cyan_skillfish_get_dpm_ultimate_freq,
> > .register_irq_handler = smu_v11_0_register_irq_handler,
> > .notify_memory_pool_location = smu_v11_0_notify_memory_pool_location,
> > .send_smc_msg_with_param = smu_cmn_send_smc_msg_with_param,
> >
