[AMD Official Use Only] Please do not use "//" in linux kernel patch , use "/* */" instead
After this part fixed the patch is : Reviewed-by: Monk Liu <[email protected]> Thanks ------------------------------------------ Monk Liu | Cloud-GPU Core team ------------------------------------------ -----Original Message----- From: YuBiao Wang <[email protected]> Sent: Tuesday, June 29, 2021 6:01 PM To: [email protected] Cc: Grodzovsky, Andrey <[email protected]>; Quan, Evan <[email protected]>; Chen, Horace <[email protected]>; Tuikov, Luben <[email protected]>; Koenig, Christian <[email protected]>; Deucher, Alexander <[email protected]>; Xiao, Jack <[email protected]>; Zhang, Hawking <[email protected]>; Liu, Monk <[email protected]>; Xu, Feifei <[email protected]>; Wang, Kevin(Yang) <[email protected]>; Wang, YuBiao <[email protected]> Subject: [PATCH 1/1] drm/amdgpu: Read clock counter via MMIO to reduce delay [Why] GPU timing counters are read via KIQ under sriov, which will introduce a delay. [How] It could be directly read by MMIO. v2: Add additional check to prevent carryover issue. v3: Only check for carryover for once to prevent performance issue. Signed-off-by: YuBiao Wang <[email protected]> Acked-by: Horace Chen <[email protected]> --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index ff7e9f49040e..82a5b7ab8dc5 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c @@ -7610,6 +7610,7 @@ static int gfx_v10_0_soft_reset(void *handle) static uint64_t gfx_v10_0_get_gpu_clock_counter(struct amdgpu_device *adev) { uint64_t clock; + uint64_t clock_lo, clock_hi, hi_check; amdgpu_gfx_off_ctrl(adev, false); mutex_lock(&adev->gfx.gpu_clock_mutex); @@ -7620,8 +7621,15 @@ static uint64_t gfx_v10_0_get_gpu_clock_counter(struct amdgpu_device *adev) ((uint64_t)RREG32_SOC15(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER_Vangogh) << 32ULL); break; default: - clock = (uint64_t)RREG32_SOC15(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER) | - ((uint64_t)RREG32_SOC15(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER) << 32ULL); + clock_hi = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER); + clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER); + hi_check = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER); + // If carryover happens, update lower count again. + if (hi_check != clock_hi) { + clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER); + clock_hi = hi_check; + } + clock = (uint64_t)clock_lo | ((uint64_t)clock_hi << 32ULL); break; } mutex_unlock(&adev->gfx.gpu_clock_mutex); -- 2.25.1 _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
