[AMD Official Use Only] Series seems fine to me. Reviewed-by: Evan Quan <[email protected]>
BR Evan > -----Original Message----- > From: amd-gfx <[email protected]> On Behalf Of > Graham Sider > Sent: Monday, June 7, 2021 9:45 PM > To: [email protected] > Cc: Kasiviswanathan, Harish <[email protected]>; Sider, > Graham <[email protected]>; Sakhnovitch, Elena (Elen) > <[email protected]> > Subject: [PATCH v5 9/9] drm/amd/pm: Add aldebaran throttler translation > > Perform dependent to independent throttle status translation for aldebaran. > > Signed-off-by: Graham Sider <[email protected]> > --- > .../drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 27 +++++++++++++++- > --- > 1 file changed, 22 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c > b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c > index 7a1abb3d6a7a..0845d4b30a0d 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c > @@ -191,6 +191,20 @@ static const struct cmn2asic_mapping > aldebaran_table_map[SMU_TABLE_COUNT] = { > TAB_MAP(I2C_COMMANDS), > }; > > +static const uint8_t aldebaran_throttler_map[] = { > + [THROTTLER_PPT0_BIT] = > (SMU_THROTTLER_PPT0_BIT), > + [THROTTLER_PPT1_BIT] = > (SMU_THROTTLER_PPT1_BIT), > + [THROTTLER_TDC_GFX_BIT] = > (SMU_THROTTLER_TDC_GFX_BIT), > + [THROTTLER_TDC_SOC_BIT] = > (SMU_THROTTLER_TDC_SOC_BIT), > + [THROTTLER_TDC_HBM_BIT] = > (SMU_THROTTLER_TDC_MEM_BIT), > + [THROTTLER_TEMP_GPU_BIT] = > (SMU_THROTTLER_TEMP_GPU_BIT), > + [THROTTLER_TEMP_MEM_BIT] = > (SMU_THROTTLER_TEMP_MEM_BIT), > + [THROTTLER_TEMP_VR_GFX_BIT] = > (SMU_THROTTLER_TEMP_VR_GFX_BIT), > + [THROTTLER_TEMP_VR_SOC_BIT] = > (SMU_THROTTLER_TEMP_VR_SOC_BIT), > + [THROTTLER_TEMP_VR_MEM_BIT] = > (SMU_THROTTLER_TEMP_VR_MEM0_BIT), > + [THROTTLER_APCC_BIT] = > (SMU_THROTTLER_APCC_BIT), > +}; > + > static int aldebaran_tables_init(struct smu_context *smu) { > struct smu_table_context *smu_table = &smu->smu_table; @@ - > 213,7 +227,7 @@ static int aldebaran_tables_init(struct smu_context *smu) > return -ENOMEM; > smu_table->metrics_time = 0; > > - smu_table->gpu_metrics_table_size = sizeof(struct > gpu_metrics_v1_2); > + smu_table->gpu_metrics_table_size = sizeof(struct > gpu_metrics_v1_3); > smu_table->gpu_metrics_table = kzalloc(smu_table- > >gpu_metrics_table_size, GFP_KERNEL); > if (!smu_table->gpu_metrics_table) { > kfree(smu_table->metrics_table); > @@ -1713,8 +1727,8 @@ static ssize_t aldebaran_get_gpu_metrics(struct > smu_context *smu, > void **table) > { > struct smu_table_context *smu_table = &smu->smu_table; > - struct gpu_metrics_v1_2 *gpu_metrics = > - (struct gpu_metrics_v1_2 *)smu_table->gpu_metrics_table; > + struct gpu_metrics_v1_3 *gpu_metrics = > + (struct gpu_metrics_v1_3 *)smu_table->gpu_metrics_table; > SmuMetrics_t metrics; > int i, ret = 0; > > @@ -1724,7 +1738,7 @@ static ssize_t aldebaran_get_gpu_metrics(struct > smu_context *smu, > if (ret) > return ret; > > - smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 2); > + smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 3); > > gpu_metrics->temperature_edge = metrics.TemperatureEdge; > gpu_metrics->temperature_hotspot = metrics.TemperatureHotspot; > @@ -1755,6 +1769,9 @@ static ssize_t aldebaran_get_gpu_metrics(struct > smu_context *smu, > gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK]; > > gpu_metrics->throttle_status = metrics.ThrottlerStatus; > + gpu_metrics->indep_throttle_status = > + > smu_cmn_get_indep_throttler_status(metrics.ThrottlerStatus, > + > aldebaran_throttler_map); > > gpu_metrics->current_fan_speed = 0; > > @@ -1776,7 +1793,7 @@ static ssize_t aldebaran_get_gpu_metrics(struct > smu_context *smu, > > *table = (void *)gpu_metrics; > > - return sizeof(struct gpu_metrics_v1_2); > + return sizeof(struct gpu_metrics_v1_3); > } > > static int aldebaran_mode2_reset(struct smu_context *smu) > -- > 2.17.1 > > _______________________________________________ > amd-gfx mailing list > [email protected] > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists. > freedesktop.org%2Fmailman%2Flistinfo%2Famd- > gfx&data=04%7C01%7Cevan.quan%40amd.com%7C1360514bfba14bf2f > 7b608d929ba82be%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C6 > 37586703300653696%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMD > AiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata= > xCJ5F1UI3MGbeMuKd0pXzQljcYncretn%2BcUFMGDi6yg%3D&reserved > =0 _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
