[AMD Official Use Only - Internal Distribution Only]
________________________________ From: amd-gfx <[email protected]> on behalf of Xiaomeng Hou <[email protected]> Sent: Tuesday, December 8, 2020 7:19 PM To: [email protected] <[email protected]> Cc: Deucher, Alexander <[email protected]>; Huang, Ray <[email protected]>; Hou, Xiaomeng (Matthew) <[email protected]>; Quan, Evan <[email protected]> Subject: [PATCH 3/3] drm/amdgpu/pm: inform PMFW rlc status before start/stop rlc for vangogh RLC is halted when system suspend/shutdown. However, due to DPM enabled, PMFM is unaware of RLC being halted and will continue sending messages, which would eventually caused ACPI related hang. So send message to inform PMFM the rlc status before start/stop rlc. Signed-off-by: Xiaomeng Hou <[email protected]> Change-Id: I7b1a04f6e249ac6753109079ecb3019c99161d9f --- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c index cf999b7a2164..42a32c0e5bab 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -920,6 +920,14 @@ static int smu_smc_hw_setup(struct smu_context *smu) uint32_t pcie_gen = 0, pcie_width = 0; int ret = 0; + if (adev->in_suspend && smu->is_apu) { + ret = smu_notify_rlc_status(smu, 1); [kevin]: for 2nd parameter of '1', why not use the macro to replace it which is defined in previous patch ? and why not put these codes into smu_resume/suspend functions? + if (ret) { + dev_info(adev->dev, "Failed to notify rlc status!\n"); + return ret; + } + } + if (adev->in_suspend && smu_is_dpm_running(smu)) { dev_info(adev->dev, "dpm has been enabled\n"); /* this is needed specifically */ @@ -1213,6 +1221,14 @@ static int smu_disable_dpms(struct smu_context *smu) dev_err(adev->dev, "Failed to disable smu features.\n"); } + if (smu->is_apu) { + ret = smu_notify_rlc_status(smu, 0); + if (ret) { + dev_info(adev->dev, "Failed to notify rlc status!\n"); + return ret; + } + } + if (adev->asic_type >= CHIP_NAVI10 && adev->gfx.rlc.funcs->stop) adev->gfx.rlc.funcs->stop(adev); -- 2.17.1 _______________________________________________ amd-gfx mailing list [email protected] https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7CKevin1.Wang%40amd.com%7Cb3afedc0e8a34992b17408d89b6b4f02%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637430232491676693%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=2gyWC0ytrVqLqNX2OappS8ALSyWkNa0xKYp96vMpxfk%3D&reserved=0
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