On Tue, Nov 24, 2020 at 2:44 PM Lee Jones <[email protected]> wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c: In function ‘gfx_v10_rlcg_wreg’:
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:1416:18: warning: variable ‘grbm_idx’
> set but not used [-Wunused-but-set-variable]
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:1415:18: warning: variable
> ‘grbm_cntl’ set but not used [-Wunused-but-set-variable]
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:1413:15: warning: variable
> ‘scratch_reg3’ set but not used [-Wunused-but-set-variable]
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:1412:15: warning: variable
> ‘scratch_reg2’ set but not used [-Wunused-but-set-variable]
>
> Cc: Alex Deucher <[email protected]>
> Cc: "Christian König" <[email protected]>
> Cc: David Airlie <[email protected]>
> Cc: Daniel Vetter <[email protected]>
> Cc: Sumit Semwal <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Lee Jones <[email protected]>
Applied. Thanks!
Alex
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 9 ---------
> 1 file changed, 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index a6d03931f7fa4..d4760f4e269a1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -1409,23 +1409,14 @@ static void gfx_v10_rlcg_wreg(struct amdgpu_device
> *adev, u32 offset, u32 v)
> {
> static void *scratch_reg0;
> static void *scratch_reg1;
> - static void *scratch_reg2;
> - static void *scratch_reg3;
> static void *spare_int;
> - static uint32_t grbm_cntl;
> - static uint32_t grbm_idx;
> uint32_t i = 0;
> uint32_t retries = 50000;
>
> scratch_reg0 = adev->rmmio +
> (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG0_BASE_IDX] + mmSCRATCH_REG0)*4;
> scratch_reg1 = adev->rmmio +
> (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG1)*4;
> - scratch_reg2 = adev->rmmio +
> (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG2)*4;
> - scratch_reg3 = adev->rmmio +
> (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG3)*4;
> spare_int = adev->rmmio +
> (adev->reg_offset[GC_HWIP][0][mmRLC_SPARE_INT_BASE_IDX] + mmRLC_SPARE_INT)*4;
>
> - grbm_cntl = adev->reg_offset[GC_HWIP][0][mmGRBM_GFX_CNTL_BASE_IDX] +
> mmGRBM_GFX_CNTL;
> - grbm_idx = adev->reg_offset[GC_HWIP][0][mmGRBM_GFX_INDEX_BASE_IDX] +
> mmGRBM_GFX_INDEX;
> -
> if (amdgpu_sriov_runtime(adev)) {
> pr_err("shouldn't call rlcg write register during runtime\n");
> return;
> --
> 2.25.1
>
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