[AMD Public Use] It seems to me the kernel amdgpu_drm.h doesn't sync up with libdrm amdgpu_drm.h if your patch is based on drm-master.
I'd expect another patch to add AMDGPU_IB_FLAG_EMIT_MEM_SYNC flag in libdrm since kernel already has the flag for a while. Other than that, the patch is Reviewed-by: Hawking Zhang <[email protected]> Regards, Hawking -----Original Message----- From: Gao, Likun <[email protected]> Sent: Tuesday, July 7, 2020 21:15 To: [email protected] Cc: Zhang, Hawking <[email protected]>; Gao, Likun <[email protected]> Subject: [PATCH] tests/amdgpu: set emit fence flag for multi fence From: Likun Gao <[email protected]> Set AMDGPU_IB_FLAG_EMIT_MEM_SYNC flag for specific ASIC when test multi fence. Signed-off-by: Likun Gao <[email protected]> Change-Id: I41e5cb19d9ca72c1d396cc28d1b54c31773fe4d5 --- include/drm/amdgpu_drm.h | 2 ++ tests/amdgpu/basic_tests.c | 6 ++++++ 2 files changed, 8 insertions(+) diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h index 4fe35d60..8a4d7da9 100644 --- a/include/drm/amdgpu_drm.h +++ b/include/drm/amdgpu_drm.h @@ -586,6 +586,8 @@ union drm_amdgpu_cs { */ #define AMDGPU_IB_FLAG_RESET_GDS_MAX_WAVE_ID (1 << 4) +#define AMDGPU_IB_FLAG_EMIT_MEM_SYNC (1 << 6) + struct drm_amdgpu_cs_chunk_ib { __u32 _pad; /** AMDGPU_IB_FLAG_* */ diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 57496c82..c0f7ec33 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -45,6 +45,8 @@ static amdgpu_device_handle device_handle; static uint32_t major_version; static uint32_t minor_version; static uint32_t family_id; +static uint32_t chip_rev; +static uint32_t chip_id; static void amdgpu_query_info_test(void); static void amdgpu_command_submission_gfx(void); @@ -607,6 +609,8 @@ int suite_basic_tests_init(void) return CUE_SINIT_FAILED; family_id = gpu_info.family_id; + chip_rev = gpu_info.chip_rev; + chip_id = gpu_info.chip_external_rev; return CUE_SUCCESS; } @@ -1769,6 +1773,8 @@ static void amdgpu_command_submission_multi_fence_wait_all(bool wait_all) ib_info[0].ib_mc_address = ib_result_ce_mc_address; ib_info[0].size = i; ib_info[0].flags = AMDGPU_IB_FLAG_CE; + if (chip_id == (chip_rev + 0x28)) + ib_info[0].flags |= AMDGPU_IB_FLAG_EMIT_MEM_SYNC; /* IT_WAIT_ON_CE_COUNTER */ ptr = ib_result_cpu; -- 2.25.1 _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
