From: Leo Liu <[email protected]>

Sienna_Cichlid have 2 VCN instances, using different register for range

Signed-off-by: Leo Liu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: James Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 7 ++++++-
 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c       | 6 +++++-
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
index b8eb5ece37c0..821289bff93a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
@@ -193,8 +193,13 @@ typedef enum _AMDGPU_NAVI10_DOORBELL_ASSIGNMENT
        AMDGPU_NAVI10_DOORBELL64_VCN4_5                 = 0x18A,
        AMDGPU_NAVI10_DOORBELL64_VCN6_7                 = 0x18B,
 
+       AMDGPU_NAVI10_DOORBELL64_VCN8_9                 = 0x18C,
+       AMDGPU_NAVI10_DOORBELL64_VCNa_b                 = 0x18D,
+       AMDGPU_NAVI10_DOORBELL64_VCNc_d                 = 0x18E,
+       AMDGPU_NAVI10_DOORBELL64_VCNe_f                 = 0x18F,
+
        AMDGPU_NAVI10_DOORBELL64_FIRST_NON_CP           = 
AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE0,
-       AMDGPU_NAVI10_DOORBELL64_LAST_NON_CP            = 
AMDGPU_NAVI10_DOORBELL64_VCN6_7,
+       AMDGPU_NAVI10_DOORBELL64_LAST_NON_CP            = 
AMDGPU_NAVI10_DOORBELL64_VCNe_f,
 
        AMDGPU_NAVI10_DOORBELL_MAX_ASSIGNMENT           = 0x18F,
        AMDGPU_NAVI10_DOORBELL_INVALID                  = 0xFFFF
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c 
b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
index 4a00b064be10..7429f30398b9 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
@@ -38,6 +38,9 @@
 #define mmBIF_SDMA3_DOORBELL_RANGE             0x01d7
 #define mmBIF_SDMA3_DOORBELL_RANGE_BASE_IDX    2
 
+#define mmBIF_MMSCH1_DOORBELL_RANGE            0x01d8
+#define mmBIF_MMSCH1_DOORBELL_RANGE_BASE_IDX   2
+
 static void nbio_v2_3_remap_hdp_registers(struct amdgpu_device *adev)
 {
        WREG32_SOC15(NBIO, 0, mmREMAP_HDP_MEM_FLUSH_CNTL,
@@ -109,7 +112,8 @@ static void nbio_v2_3_sdma_doorbell_range(struct 
amdgpu_device *adev, int instan
 static void nbio_v2_3_vcn_doorbell_range(struct amdgpu_device *adev, bool 
use_doorbell,
                                         int doorbell_index, int instance)
 {
-       u32 reg = SOC15_REG_OFFSET(NBIO, 0, mmBIF_MMSCH0_DOORBELL_RANGE);
+       u32 reg = instance ? SOC15_REG_OFFSET(NBIO, 0, 
mmBIF_MMSCH1_DOORBELL_RANGE) :
+               SOC15_REG_OFFSET(NBIO, 0, mmBIF_MMSCH0_DOORBELL_RANGE);
 
        u32 doorbell_range = RREG32(reg);
 
-- 
2.25.4

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